Datasheet LTC3890-3 (Analog Devices) - 8

LTC3890-3
pin FuncTions ITH1, ITH2 (Pin 1, Pin 13):
Error Amplifier Outputs and both controllers, determines how the LTC3890-3 operates Switching Regulator Compensation Points. Each associ- at light loads. Pulling this pin to ground selects Burst Mode ated channel’s current comparator trip point increases operation. An internal 100k resistor to ground also invokes with this control voltage. Burst Mode Operation when the pin is floated. Tying this
V
pin to INTV
FB1, VFB2 (Pin 2, Pin 12):
Receives the remotely sensed CC forces continuous inductor current operation. feedback voltage for each controller from an external Tying this pin to a voltage greater than 1.2V and less than resistive divider across the output. INTVCC – 1.3V selects pulse-skipping operation.
SENSE1+, SENSE2+ (Pin 3, Pin 11):
The (+) input to the
SGND (Pin 7):
Small-signal ground common to both differential current comparators are normally connected controllers, must be routed separately from high current to DCR sensing networks or current sensing resistors. grounds to the common (–) terminals of the CIN capacitors. The ITH pin voltage and controlled offsets between the
RUN1, RUN2 (Pin 8, Pin 9):
Digital Run Control Inputs SENSE– and SENSE+ pins in conjunction with RSENSE set for Each Controller. Forcing RUN1 below 1.16V or RUN2 the current trip threshold. below 1.20V shuts down that controller. Forcing both of
SENSE1–, SENSE2– (Pin 4, Pin 10):
The (–) Input to these pins below 0.7V shuts down the entire LTC3890-3, the Differential Current Comparators. When greater than reducing quiescent current to approximately 14µA. INTVCC – 0.5V, the SENSE– pin supplies current to the
INTVCC (Pin 19):
Output of the Internal Linear Low Dropout current comparator. Regulator. The driver and control circuits are powered from
FREQ (Pin 5):
The Frequency Control Pin for the Internal this voltage source. Must be decoupled to power ground VCO. Connecting the pin to GND forces the VCO to a fixed with a minimum of 4.7µF ceramic or other low ESR ca- low frequency of 350kHz. Connecting the pin to INTV pacitor. Do not use the INTV CC CC pin for any other purpose. forces the VCO to a fixed high frequency of 535kHz.
EXTVCC (Pin 20):
External Power Input to an Internal LDO Other frequencies between 50kHz and 900kHz can be Connected to INTVCC. This LDO supplies INTVCC power, programmed using a resistor between FREQ and GND. bypassing the internal LDO powered from VIN whenever An internal 20µA pull-up current develops the voltage to EXTVCC is higher than 4.7V. See EXTVCC Connection in the be used by the VCO to control the frequency. Applications Information section. Do not float or exceed
PLLIN/MODE (Pin 6):
External Synchronization Input to 14V on this pin. Phase Detector and Forced Continuous Mode Input. When
PGND (Pin 21):
Driver Power Ground. Connects to the an external clock is applied to this pin, the phase-locked sources of bottom (synchronous) N-channel MOSFETs loop will force the rising TG1 signal to be synchronized and the (–) terminal(s) of CIN. with the rising edge of the external clock. When not syn-
V
chronizing to an external clock, this input, which acts on
IN (Pin 22):
Main Supply Pin. A bypass capacitor should be tied between this pin and the signal ground pin. 38903f 8 For more information www.linear.com/3890-3 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Typical Performance Characteristics Operation Package Description Typical Application