Datasheet LTC6417 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 1.6GHz Low Noise High Linearity Differential Buffer/16-Bit ADC Driver with Fast Clamp |
| Pages / Page | 32 / 1 — FeaTures. DescripTion. 1.6GHz –3dB Small Signal Bandwidth. Low Distortion … |
| File Format / Size | PDF / 1.4 Mb |
| Document Language | English |
FeaTures. DescripTion. 1.6GHz –3dB Small Signal Bandwidth. Low Distortion Driving 50Ω Load, 2.4V. P-P Out
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LTC6417 1.6GHz Low Noise High Linearity Differential Buffer/16-Bit ADC Driver with Fast Clamp
FeaTures DescripTion
n
1.6GHz –3dB Small Signal Bandwidth
The LTC®6417 is a differential unity gain buffer that can n
Low Distortion Driving 50Ω Load, 2.4V
drive a 50Ω load with extremely low noise and excellent
P-P Out –100dBc/–69dBc HD2/HD3 at 140MHz
linearity. It is well suited for driving high speed 14- and
–80dBc IM3 and 46dBm OIP3 at 140MHz
16-bit pipeline ADCs with input signals from DC to beyond
–100dBc/–66dBc HD2/HD3 at 380MHz
600MHz. Differential input impedance is 18.5kΩ, allowing 1:4 and 1:8 transformers to be used at the input providing
–68dBc IM3 and 39dBm OIP3 at 380MHz
n additional system gain in 50Ω systems.
1.5nV/√Hz Output Noise
n
4.3pA/√Hz Input Current Noise
With no external biasing or gain setting components and n
Programmable High Speed, Fast Recovery
a flow-through pinout, the LTC6417 is very easy to use. It
Output Clamping
can be DC-coupled and has a common mode output offset n
4.28VP-P Maximum Output Swing on a 50Ω
of –60mV. The LTC6417 input pins are internally biased to
Differential Load
provide an output common mode voltage that is set by n DC-Coupled Signal Path the voltage on the VCM pin for AC-coupled applications. n Operates on Single 4.75V to 5.25V Supply Supply current is typically 123mA and the LTC6417 operates n Power: 615mW on 5V, Can Be Reduced to 370mW, on supply voltages ranging from 4.75V to 5.25V. Power Shutdown Mode 120mW consumption can be reduced to 74mA via the PWRADJ n 3mm × 4mm 20-Lead QFN Package pin. The LTC6417 also has a hardware shutdown feature which reduces current consumption to 24mA.
applicaTions
The LTC6417 features fast, adjustable output voltage clamp- ing to help protect subsequent circuitry. The CLHI pin sets n Differential ADC Driver the maximum swing, while a symmetric minimum swing n CCD Buffer is set up internally. LTC6417 VOR pin will signal overrange n Cable Driver when the clamps limit output voltage. n 50Ω Buffer The LTC6417 is packaged in a 20-lead 3mm × 4mm QFN L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. package. Pinout is optimized for placement directly adjacent to Linear Technology’s high speed 14- and 16-bit ADCs.
Typical applicaTion LTC6417 Driving LTC2209 LTC6417 Driving an LTC2209 16-Bit ADC at 140MHz IF 16-Bit ADC 32K Point FFT, f
3.3V
IN = 140MHz, –1dBFS, PGA = 0
5V 0 HD2 = –88dBc C43 C45 –10 2.2µF E3 HD3 = –94dBc 680pF 0.1µF 27pF E1 18pF 51nH 75nH –20 SFDR = 88dBc 1,6, –30 SNR = 75.4dB 11,16 SEE FIGURE 1/TABLE 1 R36 R42 –40 1:4 BALUN T1 5 60.4Ω 300Ω 10Ω V+ –50 fS = 153.6Msps WBC4-14LB PWRADJ 2 –60 DEMO BOARD DC1685A 4 3 8 CLHI C40 100Ω IN+ 19 C41 R53 A + 12pF IN –70 2 OUT+ 12pF E5 120Ω 16 50Ω LTC6417 LTC2209 OUT – 51nH AMPLITUDE (dBFS) –80 • • 9 R12 100Ω IN– V C10 R43 – OR 18 AIN –90 + V 6 1 CM 60.4Ω 12pF 300Ω 10Ω – SHDN 14 VCM PGA = 0 –100 0.01µF GND 15 12 C44 C46 –110 0.01µF 1k E3 27pF E2 18pF 51nH 75nH –120 3,7,10, CLOCK 0 10 20 30 40 50 60 70 80 17, 20,21 (153.6MHz) FREQUENCY (MHz) 6417 TA01b 6417 TA01a 2.2µF 6417f 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information DC Electrical Characteristics AC Electrical Characteristics Typical Performance Characteristics Pin Functions DC Test Circuit Schematic Block Diagram Applications Information Package Description Typical Application Related Parts
FeaTures DescripTion
n
1.6GHz –3dB Small Signal Bandwidth
The LTC®6417 is a differential unity gain buffer that can n
Low Distortion Driving 50Ω Load, 2.4V
drive a 50Ω load with extremely low noise and excellent
P-P Out –100dBc/–69dBc HD2/HD3 at 140MHz
linearity. It is well suited for driving high speed 14- and
–80dBc IM3 and 46dBm OIP3 at 140MHz
16-bit pipeline ADCs with input signals from DC to beyond
–100dBc/–66dBc HD2/HD3 at 380MHz
600MHz. Differential input impedance is 18.5kΩ, allowing 1:4 and 1:8 transformers to be used at the input providing
–68dBc IM3 and 39dBm OIP3 at 380MHz
n additional system gain in 50Ω systems.
1.5nV/√Hz Output Noise
n
4.3pA/√Hz Input Current Noise
With no external biasing or gain setting components and n
Programmable High Speed, Fast Recovery
a flow-through pinout, the LTC6417 is very easy to use. It
Output Clamping
can be DC-coupled and has a common mode output offset n
4.28VP-P Maximum Output Swing on a 50Ω
of –60mV. The LTC6417 input pins are internally biased to
Differential Load
provide an output common mode voltage that is set by n DC-Coupled Signal Path the voltage on the VCM pin for AC-coupled applications. n Operates on Single 4.75V to 5.25V Supply Supply current is typically 123mA and the LTC6417 operates n Power: 615mW on 5V, Can Be Reduced to 370mW, on supply voltages ranging from 4.75V to 5.25V. Power Shutdown Mode 120mW consumption can be reduced to 74mA via the PWRADJ n 3mm × 4mm 20-Lead QFN Package pin. The LTC6417 also has a hardware shutdown feature which reduces current consumption to 24mA.
applicaTions
The LTC6417 features fast, adjustable output voltage clamp- ing to help protect subsequent circuitry. The CLHI pin sets n Differential ADC Driver the maximum swing, while a symmetric minimum swing n CCD Buffer is set up internally. LTC6417 VOR pin will signal overrange n Cable Driver when the clamps limit output voltage. n 50Ω Buffer The LTC6417 is packaged in a 20-lead 3mm × 4mm QFN L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. package. Pinout is optimized for placement directly adjacent to Linear Technology’s high speed 14- and 16-bit ADCs.
Typical applicaTion LTC6417 Driving LTC2209 LTC6417 Driving an LTC2209 16-Bit ADC at 140MHz IF 16-Bit ADC 32K Point FFT, f
3.3V
IN = 140MHz, –1dBFS, PGA = 0
5V 0 HD2 = –88dBc C43 C45 –10 2.2µF E3 HD3 = –94dBc 680pF 0.1µF 27pF E1 18pF 51nH 75nH –20 SFDR = 88dBc 1,6, –30 SNR = 75.4dB 11,16 SEE FIGURE 1/TABLE 1 R36 R42 –40 1:4 BALUN T1 5 60.4Ω 300Ω 10Ω V+ –50 fS = 153.6Msps WBC4-14LB PWRADJ 2 –60 DEMO BOARD DC1685A 4 3 8 CLHI C40 100Ω IN+ 19 C41 R53 A + 12pF IN –70 2 OUT+ 12pF E5 120Ω 16 50Ω LTC6417 LTC2209 OUT – 51nH AMPLITUDE (dBFS) –80 • • 9 R12 100Ω IN– V C10 R43 – OR 18 AIN –90 + V 6 1 CM 60.4Ω 12pF 300Ω 10Ω – SHDN 14 VCM PGA = 0 –100 0.01µF GND 15 12 C44 C46 –110 0.01µF 1k E3 27pF E2 18pF 51nH 75nH –120 3,7,10, CLOCK 0 10 20 30 40 50 60 70 80 17, 20,21 (153.6MHz) FREQUENCY (MHz) 6417 TA01b 6417 TA01a 2.2µF 6417f 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information DC Electrical Characteristics AC Electrical Characteristics Typical Performance Characteristics Pin Functions DC Test Circuit Schematic Block Diagram Applications Information Package Description Typical Application Related Parts
