Datasheet AD8368 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | 800 MHz, Linear-in-dB VGA with AGC Detector |
| Pages / Page | 20 / 3 — Data Sheet. AD8368. SPECIFICATIONS. Table 1. Parameter. Min. Typ. Max. … |
| Revision | C |
| File Format / Size | PDF / 743 Kb |
| Document Language | English |
Data Sheet. AD8368. SPECIFICATIONS. Table 1. Parameter. Min. Typ. Max. Unit. Conditions
Model Line for this Datasheet
Text Version of Document
Data Sheet AD8368 SPECIFICATIONS
VS = 5 V, TA = 25°C, system impedance Z0 = 50 Ω, VMODE = 5 V, RF input = 140 MHz, unless otherwise noted.
Table 1. Parameter Min Typ Max Unit Conditions
OVERALL FUNCTION Frequency Range LF 800 MHz 3 dB bandwidth Maximum Input 3 VP To avoid input overload Maximum Output1 2 VP To avoid clipping AC Input Impedance 50 Ω From INPT to ICOM AC Output Impedance 50 Ω From OUTP to OCOM GAIN CONTROL INTERFACE (GAIN) Gain Span 34 dB Gain Scaling 37.5 dB/V VMODE = 5 V, 50 mV ≤ VGAIN ≤ 950 mV −38 dB/V VMODE = 0 V, 50 mV ≤ VGAIN ≤ 950 mV Gain Accuracy ±0.4 dB 100 mV ≤ VGAIN ≤ 900 mV Maximum Gain 22 dB VGAIN = 1 V Minimum Gain −12 dB VGAIN = 0 V VGAIN Range 0 1 V Gain Step Response 100 ns For 6 dB gain step Gain Input Bias Current −2 µA f = 70 MHz Noise Figure 9.5 dB Maximum gain Output IP3 34 dBm f1 = 70 MHz, f2 = 71 MHz, VGAIN = 1 V, 0 dBm per output tone Output P1dB1 16 dBm VGAIN = 0 V, VMODE = 0 V f = 140 MHz Noise Figure 9.5 dB Maximum gain Output IP3 33 dBm f1 = 140 MHz, f2 = 141 MHz, VGAIN = 1 V, 0 dBm per output tone Output P1dB1 16 dBm VGAIN = 0 V, VMODE = 0 V f = 240 MHz Noise Figure 9.7 dB Maximum gain Output IP3 33 dBm f1 = 240 MHz, f2 = 241 MHz, VGAIN = 1 V, 0 dBm per output tone Output P1dB1 15 dBm VGAIN = 0 V, VMODE = 0 V f = 380 MHz Noise Figure 10 dB Maximum gain Output IP3 29 dBm f1 = 380 MHz, f2 = 381 MHz, VGAIN = 1 V, 0 dBm per output tone Output P1dB1 13 dBm VGAIN = 0 V, VMODE = 0 V 1 Operation at compression is not recommended due to adverse distortion components. Rev. C | Page 3 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION INPUT ATTENUATOR AND INTERPOLATOR FIXED-GAIN STAGE AND OUTPUT BUFFER OUTPUT OFFSET CORRECTION INPUT AND OUTPUT IMPEDANCES GAIN CONTROL INTERFACE APPLICATIONS INFORMATION VGA OPERATION AGC OPERATION STABILITY AND LAYOUT CONSIDERATIONS EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
VS = 5 V, TA = 25°C, system impedance Z0 = 50 Ω, VMODE = 5 V, RF input = 140 MHz, unless otherwise noted.
Table 1. Parameter Min Typ Max Unit Conditions
OVERALL FUNCTION Frequency Range LF 800 MHz 3 dB bandwidth Maximum Input 3 VP To avoid input overload Maximum Output1 2 VP To avoid clipping AC Input Impedance 50 Ω From INPT to ICOM AC Output Impedance 50 Ω From OUTP to OCOM GAIN CONTROL INTERFACE (GAIN) Gain Span 34 dB Gain Scaling 37.5 dB/V VMODE = 5 V, 50 mV ≤ VGAIN ≤ 950 mV −38 dB/V VMODE = 0 V, 50 mV ≤ VGAIN ≤ 950 mV Gain Accuracy ±0.4 dB 100 mV ≤ VGAIN ≤ 900 mV Maximum Gain 22 dB VGAIN = 1 V Minimum Gain −12 dB VGAIN = 0 V VGAIN Range 0 1 V Gain Step Response 100 ns For 6 dB gain step Gain Input Bias Current −2 µA f = 70 MHz Noise Figure 9.5 dB Maximum gain Output IP3 34 dBm f1 = 70 MHz, f2 = 71 MHz, VGAIN = 1 V, 0 dBm per output tone Output P1dB1 16 dBm VGAIN = 0 V, VMODE = 0 V f = 140 MHz Noise Figure 9.5 dB Maximum gain Output IP3 33 dBm f1 = 140 MHz, f2 = 141 MHz, VGAIN = 1 V, 0 dBm per output tone Output P1dB1 16 dBm VGAIN = 0 V, VMODE = 0 V f = 240 MHz Noise Figure 9.7 dB Maximum gain Output IP3 33 dBm f1 = 240 MHz, f2 = 241 MHz, VGAIN = 1 V, 0 dBm per output tone Output P1dB1 15 dBm VGAIN = 0 V, VMODE = 0 V f = 380 MHz Noise Figure 10 dB Maximum gain Output IP3 29 dBm f1 = 380 MHz, f2 = 381 MHz, VGAIN = 1 V, 0 dBm per output tone Output P1dB1 13 dBm VGAIN = 0 V, VMODE = 0 V 1 Operation at compression is not recommended due to adverse distortion components. Rev. C | Page 3 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT DESCRIPTION INPUT ATTENUATOR AND INTERPOLATOR FIXED-GAIN STAGE AND OUTPUT BUFFER OUTPUT OFFSET CORRECTION INPUT AND OUTPUT IMPEDANCES GAIN CONTROL INTERFACE APPLICATIONS INFORMATION VGA OPERATION AGC OPERATION STABILITY AND LAYOUT CONSIDERATIONS EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
