Datasheet AD8367 (Analog Devices) - 17

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AD8367 2.2
Ω
5V 10nF C2 VOUT INTO A 0.27
μ
F AD8367 200
Ω
LOAD C 1 ICOM ICOM 14 HP R 10nF HP 10nF 100
Ω
U2 2 ENBL J1 U1 HPFL 13 10nF 0.1
μ
F AD8361 INPUT 3 INPT VPSI 12 1 VPOS SREF 8 R6 4 MODE VPSO 11 57.6
Ω
R1 2 IREF VRMS 7 200k
Ω
5 GAIN VOUT 10 3 RFIN FLTR 6 6 DETO DECL 9 C5 4 PWDN COMM 5 C1 10nF 7 ICOM OCOM 8 3.3nF Vg R3 V 82k
Ω
20pF R2 AGC 4 2 150k
Ω
R4 Vrms 33k
Ω
U3 6 AD820 12k
Ω
R5 3 10k
Ω
VSET 0.1
μ
F 7
038
5V
2710- 0 Figure 38. Example of Using an External Detector to Form an AGC Loop Note that in this circuit the AD8367’s MODE pin must be The component values shown in Figure 38 were chosen for a pulled high to obtain correct feedback polarity because the 64-QAM signal at 500 kS/s at a carrier frequency of 150 MHz. integrator inverts the polarity of the feedback signal. The response time of the loop as shown is roughly 5 ms for an abrupt input level change of 40 dB. Figure 41 shows the The relationship between the setpoint voltage and the rms dynamic performance of the loop with a step-modulated output voltage of the AD8367 is CW signal applied to the input for a VSET of about 1 V. (R1+ 225) For a linear-in-dB response, detectors such as the AD8318 or V (6) OUT − = V × RMS SET 225 × 7.5 the AD8362 can be used in place of the AD8361.
4.0
where 225 is the input resistance of the AD8361 and 7.5 is its conversion gain. For R1 = 200 Ω, this reduces to VOUT –RMS = VSET
3.5
× 0.25.
3.0 10MHz
Capacitor C2 sets the averaging time for the rms detector. This
2.5
should be made long enough to provide sufficient smoothing of
) 380MHz (V
the detector’s output in the presence of the modulation on the
2.0 SETV
RF signal. A level fluctuation of less than 1 dB (<5% to 10%) p-p
1.5
at the AD8361’s output is a reasonable value. A considerably longer time constant needlessly lowers the AGC bandwidth,
1.0
while a short time constant can degrade the accuracy of the
0.5
true-rms measurement process. Components C1, R2, and R3 02710-039 set the control loop’s bandwidth and stability. The maximum
0 –20 –15 –10 –5 0 5 10
stable loop bandwidth is limited by the rms detector’s averaging
POUT (dBm INTO 200
Ω
)
time constant as previously discussed. Figure 39. AGC Setpoint Voltage vs. Output Power (QPSK: 4.096 MS/s; α = 0.22; 1 User) For an input signal consisting of a 4.096 MS/s QPSK modulated carrier, the relationship between VSET and the output power for this setup is shown in Figure 39. The exponential shape reflects the linear-in-magnitude response of the AD8361. The adjacent channel power ratio (ACPR) as a function of output power is illustrated in Figure 40. The minima occur where the distortion and integrated noise powers cross over. Rev. A | Page 17 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION INPUT ATTENUATOR AND GAIN CONTROL INPUT AND OUTPUT INTERFACES POWER AND VOLTAGE METRICS NOISE AND DISTORTION OUTPUT CENTERING RMS DETECTION APPLICATIONS INPUT AND OUTPUT MATCHING VGA OPERATION MODULATED GAIN MODE AGC OPERATION MODIFYING THE AGC SETPOINT EVALUATION BOARD CHARACTERIZATION SETUP AND METHODS OUTLINE DIMENSIONS ORDERING GUIDE