link to page 28 link to page 28 AD8233Data SheetSYNCHRONIZED ECG AND PPG MEASUREMENT ADPD105 channel that processes the ECG signal must be set up In wearable devices developed for monitoring the health care of in either pulse connect mode or transimpedance amplifier (TIA) patients, it is often necessary to have synchronized measurements ADC mode, and the input bias voltage must be set to the 0.9 V of biomedical signals. For example, a synchronous measurement of setting. The TIA gain setting can be set to optimize the dynamic a ECG and photoplethysmograph (PPG) can be used to determine range of the signal path. The channel used to process the PPG the pulse wave transit time (PWTT), which can then be used to signal is configured in its normal operating mode. Figure 76 estimate blood pressure. shows a plot of a synchronized ECG and PPG measurement using the AD8233 with the ADPD105. The circuit shown in Figure 77 shows a synchronous ECG and SHOWN WITH fSAMPLE = 100Hz PPG measurement using the AD8233 and the ADPD105 PPG photometric front end. The AD8233 implements a two-pole, ECG high-pass filter with a cutoff frequency of 0.3 Hz, and a two-pole, low-pass filter with a cutoff frequency of 37 Hz. The output of the AD8233 is fed to one of the current inputs of the ADPD105 through a 50 kΩ resistor to convert the voltage output of the AD8233 into a current. The PPG signal is acquired by the ADPD105, which is a complete optical transceiver with integrated LED drivers, multiple photodiode current inputs, an integrated, 14-bit, successive approximation (SAR) ADC, and a FIFO. In the circuit shown, the chip scale ADPD105 is used; the ADPD105 is a two input device. The ADPD105 is configured to 00.51.01.52.02.53.03.5 78 -0 alternately measure the photodiode signal and the ECG signal TIME (Seconds) 737 13 from the AD8233 on consecutive time slots to provide fully Figure 76. Synchronous ECG and PPG Measurement Using the AD8233 with synchronized PPG and ECG measurements. Data can be read the ADPD105 out of the on-chip FIFO or straight from the data registers. The 1.8V4.7µF10MΩHPDRIVEHPSENSE10MΩ 180kΩ10MΩLA+INIAOUT1.8V180kΩRA–INREFIN10MΩ0.1µF4.7µFRLDFB+VS10MΩ1nF0.1µF360kΩRLRLDGNDAD8233SWFR1.8V1MΩ1MΩOPAMP+AC/DC100kΩ 6.8nFREFOUTSDN250kΩ2.7nFOPAMP–TO DIGITALRLD SDN1MΩINTERFACEOUTLOD1.8VADPD10550kΩPD1-2DVDD0.1µFAVDD0.1µFVLEDPDCAGND DGND1.8VLGNDPD3-410kΩ 10kΩLEDX1SCLVREFSDA1µFTO DIGITALGPIO0INTERFACE 7 07 GPIO1 37- 137 Figure 77. Synchronous ECG and PPG Measurement Circuit Rev. 0 | Page 28 of 29 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS INSTRUMENTATION AMPLIFIER PERFORMANCE CHARACTERISTICS OPERATIONAL AMPLIFIER PERFORMANCE CHARACTERISTICS RIGHT LEG DRIVE (RLD) AMPLIFIER PERFORMANCE CHARACTERISTICS REFERENCE BUFFER PERFORMANCE CHARACTERISTICS SYSTEM PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE OVERVIEW INSTRUMENTATION AMPLIFIER OPERATIONAL AMPLIFIER RIGHT LEG DRIVE AMPLIFIER REFERENCE BUFFER FAST RESTORE CIRCUIT LEADS ON/OFF DETECTION DC Leads On/Off Detection AC Leads On/Off Detection STANDBY OPERATION INPUT PROTECTION RADIO FREQUENCY INTERFERENCE (RFI) POWER SUPPLY REGULATION AND BYPASSING INPUT REFERRED OFFSETS LAYOUT RECOMMENDATIONS APPLICATIONS INFORMATION ELIMINATING ELECTRODE OFFSETS HIGH-PASS FILTERING Two-Pole High-Pass Filter Additional High-Pass Filtering Options LOW-PASS FILTERING AND GAIN Driving ADCs DRIVEN ELECTRODE APPLICATION CIRCUITS HEART RATE MEASUREMENT (HRM) NEXT TO THE HEART EXERCISE APPLICATION—HEART RATE MEASURED AT THE HANDS HOLTER MONITOR CONFIGURATION SYNCHRONIZED ECG AND PPG MEASUREMENT PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE