Datasheet LTC3624, LTC3624-2 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 17V, 2A Synchronous Step-Down Regulator with 3.5μA Quiescent Current |
| Pages / Page | 20 / 9 — operaTion. Main Control Loop. Forced Continuous Mode Operation. High Duty … |
| File Format / Size | PDF / 327 Kb |
| Document Language | English |
operaTion. Main Control Loop. Forced Continuous Mode Operation. High Duty Cycle/Dropout Operation. Low Current Operation
Model Line for this Datasheet
- LTC3624EDD#PBF LTC3624EDD#TRPBF LTC3624EDD-2#PBF LTC3624EDD-2#TRPBF LTC3624EDD-23.3#PBF LTC3624EDD-23.3#TRPBF LTC3624EDD-25#PBF LTC3624EDD-25#TRPBF LTC3624EDD-3.3#PBF LTC3624EDD-3.3#TRPBF LTC3624EDD-5#PBF LTC3624EDD-5#TRPBF LTC3624EMSE#PBF LTC3624EMSE#TRPBF LTC3624EMSE-2#PBF LTC3624EMSE-2#TRPBF LTC3624EMSE-23.3#PBF LTC3624EMSE-23.3#TRPBF LTC3624EMSE-25#PBF LTC3624EMSE-25#TRPBF LTC3624EMSE-3.3#PBF LTC3624EMSE-3.3#TRPBF LTC3624EMSE-5#PBF LTC3624EMSE-5#TRPBF LTC3624HMSE#PBF LTC3624HMSE#TRPBF LTC3624HMSE-2#PBF LTC3624HMSE-2#TRPBF LTC3624HMSE-23.3#PBF LTC3624HMSE-23.3#TRPBF LTC3624HMSE-25#PBF LTC3624HMSE-25#TRPBF LTC3624HMSE-3.3#PBF LTC3624HMSE-3.3#TRPBF LTC3624HMSE-5#PBF LTC3624HMSE-5#TRPBF LTC3624IDD#PBF LTC3624IDD#TRPBF LTC3624IDD-2#PBF LTC3624IDD-2#TRPBF LTC3624IDD-23.3#PBF LTC3624IDD-23.3#TRPBF LTC3624IDD-25#PBF LTC3624IDD-25#TRPBF LTC3624IDD-3.3#PBF LTC3624IDD-3.3#TRPBF LTC3624IDD-5#PBF LTC3624IDD-5#TRPBF LTC3624IMSE#PBF LTC3624IMSE#TRPBF LTC3624IMSE-2#PBF LTC3624IMSE-2#TRPBF LTC3624IMSE-23.3#PBF LTC3624IMSE-23.3#TRPBF LTC3624IMSE-25#PBF LTC3624IMSE-25#TRPBF LTC3624IMSE-3.3#PBF LTC3624IMSE-3.3#TRPBF LTC3624IMSE-5#PBF LTC3624IMSE-5#TRPBF
Text Version of Document
LTC3624/LTC3624-2
operaTion
The LTC3624/LTC3624-2 uses a constant-frequency, peak To optimize efficiency, Burst Mode operation can be selected current mode architecture. It operates through a wide VIN by tying the MODE/SYNC pin to INTVCC. In Burst Mode range and regulates with ultralow quiescent current. The operation, the peak inductor current is set to be at least operation frequency is set at either 1MHz or 2.25MHz and 800mA, even if the output of the error amplifier demands can be synchronized to an external oscillator ±40% of the less. Thus, when the switcher is on at relatively light output inherent frequency. To suit a variety of applications, the loads, FB voltage will rise and cause the ITH voltage to selectable MODE/SYNC pin allows the user to trade off drop. Once the ITH voltage goes below 0.2V, the switcher output ripple for efficiency. goes into its sleep mode with both power switches off. The output voltage is set by an external divider returned to The switcher remains in this sleep state until the external the FB pin. An error amplifier compares the divided output load pulls the output voltage below its regulation point. voltage with a reference voltage of 0.6V and adjusts the During sleep mode, the part draws an ultralow 3.5µA of peak inductor current accordingly. Overvoltage and un- quiescent current from VIN. dervoltage comparators will pull the PGOOD output low if To minimize VOUT ripple, pulse-skipping mode can be se- the output voltage is not within ±7.5% of the programmed lected by grounding the MODE/SYNC pin. In the LTC3624/ value. The PGOOD output will go low 32 clock cycles after LTC3624-2, pulse-skipping mode is implemented similarly falling out of regulation and will go high immediately after to Burst Mode operation with the peak inductor current achieving regulation. set to be at least 132mA. This results in lower ripple than in Burst Mode operation with the trade-off being slightly
Main Control Loop
lower efficiency. During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle.
Forced Continuous Mode Operation
The inductor current is allowed to ramp up to a peak level. Aside from the two discontinuous-conduction modes, the Once that level is reached, the top power switch is turned LTC3624/LTC3624-2 also has the ability to operate in the off and the bottom switch (N-channel MOSFET) is turned forced continuous mode by setting the MODE/SYNC volt- on until the next clock cycle. The peak current level is con- age between 1V and VINTVCC – 1.2V. In forced continuous trolled by the internally compensated ITH voltage, which is mode, the switcher will switch cycle by cycle regardless the output of the error amplifier. This amplifier compares of what the output load current is. If forced continuous the FB voltage to the 0.6V internal reference. When the mode is selected, the minimum peak current is set to load current increases, the FB voltage decreases slightly be –266mA in order to ensure that the part can operate below the reference, which causes the error amplifier to continuously at zero output load. increase the ITH voltage until the average inductor current matches the new load current.
High Duty Cycle/Dropout Operation
The main control loop is shut down by pulling the RUN When the input supply voltage decreases towards the pin to ground. output voltage, the duty cycle increases and slope com- pensation is required to maintain the fixed switching
Low Current Operation
frequency. The LTC3624/LTC3624-2 has internal circuitry Two discontinuous-conduction modes (DCMs) are available to accurately maintain the peak current limit (ILIM) of 3A to control the operation of the LTC3624/LTC3624-2 at low even at high duty cycles. currents. Both modes, Burst Mode operation and pulse- As the duty cycle approaches 100%, the LTC3624/ skipping, automatically switch from continuous operation LTC3624-2 enters dropout operation. During dropout, if to the selected mode when the load current is low. force continuous mode is selected, the top PMOS switch is turned on continuously, and all active circuitry is kept 36242fd For more information www.linear.com/LTC3624 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts
operaTion
The LTC3624/LTC3624-2 uses a constant-frequency, peak To optimize efficiency, Burst Mode operation can be selected current mode architecture. It operates through a wide VIN by tying the MODE/SYNC pin to INTVCC. In Burst Mode range and regulates with ultralow quiescent current. The operation, the peak inductor current is set to be at least operation frequency is set at either 1MHz or 2.25MHz and 800mA, even if the output of the error amplifier demands can be synchronized to an external oscillator ±40% of the less. Thus, when the switcher is on at relatively light output inherent frequency. To suit a variety of applications, the loads, FB voltage will rise and cause the ITH voltage to selectable MODE/SYNC pin allows the user to trade off drop. Once the ITH voltage goes below 0.2V, the switcher output ripple for efficiency. goes into its sleep mode with both power switches off. The output voltage is set by an external divider returned to The switcher remains in this sleep state until the external the FB pin. An error amplifier compares the divided output load pulls the output voltage below its regulation point. voltage with a reference voltage of 0.6V and adjusts the During sleep mode, the part draws an ultralow 3.5µA of peak inductor current accordingly. Overvoltage and un- quiescent current from VIN. dervoltage comparators will pull the PGOOD output low if To minimize VOUT ripple, pulse-skipping mode can be se- the output voltage is not within ±7.5% of the programmed lected by grounding the MODE/SYNC pin. In the LTC3624/ value. The PGOOD output will go low 32 clock cycles after LTC3624-2, pulse-skipping mode is implemented similarly falling out of regulation and will go high immediately after to Burst Mode operation with the peak inductor current achieving regulation. set to be at least 132mA. This results in lower ripple than in Burst Mode operation with the trade-off being slightly
Main Control Loop
lower efficiency. During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle.
Forced Continuous Mode Operation
The inductor current is allowed to ramp up to a peak level. Aside from the two discontinuous-conduction modes, the Once that level is reached, the top power switch is turned LTC3624/LTC3624-2 also has the ability to operate in the off and the bottom switch (N-channel MOSFET) is turned forced continuous mode by setting the MODE/SYNC volt- on until the next clock cycle. The peak current level is con- age between 1V and VINTVCC – 1.2V. In forced continuous trolled by the internally compensated ITH voltage, which is mode, the switcher will switch cycle by cycle regardless the output of the error amplifier. This amplifier compares of what the output load current is. If forced continuous the FB voltage to the 0.6V internal reference. When the mode is selected, the minimum peak current is set to load current increases, the FB voltage decreases slightly be –266mA in order to ensure that the part can operate below the reference, which causes the error amplifier to continuously at zero output load. increase the ITH voltage until the average inductor current matches the new load current.
High Duty Cycle/Dropout Operation
The main control loop is shut down by pulling the RUN When the input supply voltage decreases towards the pin to ground. output voltage, the duty cycle increases and slope com- pensation is required to maintain the fixed switching
Low Current Operation
frequency. The LTC3624/LTC3624-2 has internal circuitry Two discontinuous-conduction modes (DCMs) are available to accurately maintain the peak current limit (ILIM) of 3A to control the operation of the LTC3624/LTC3624-2 at low even at high duty cycles. currents. Both modes, Burst Mode operation and pulse- As the duty cycle approaches 100%, the LTC3624/ skipping, automatically switch from continuous operation LTC3624-2 enters dropout operation. During dropout, if to the selected mode when the load current is low. force continuous mode is selected, the top PMOS switch is turned on continuously, and all active circuitry is kept 36242fd For more information www.linear.com/LTC3624 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts
