Datasheet ADP5040 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Micro PMU with 1.2 A Buck Regulator and Two 300 mA LDOs |
| Pages / Page | 37 / 8 — ADP5040. Data Sheet. TYPICAL PERFORMANCE CHARACTERISTICS. VOUT1. VOUT2. … |
| Revision | D |
| File Format / Size | PDF / 3.8 Mb |
| Document Language | English |
ADP5040. Data Sheet. TYPICAL PERFORMANCE CHARACTERISTICS. VOUT1. VOUT2. VOUT3. IIN. CH4 2.0V/DIV 1MΩ BW 500M. A CH2 1.88V. 200µs/DIV
Text Version of Document
ADP5040 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS
VIN1 = VIN2 = VIN3 = AVIN = 5.0 V, TA = 25°C, unless otherwise noted.
SW 4 VOUT1 2 VOUT1 2 VOUT2 3 EN VOUT3 4 1 IIN 3 CH4 2.0V/DIV 1MΩ BW 500M A CH2 1.88V 200µs/DIV CH1 4.0V/DIV 1MΩ B A CH1 2.32V 50µs/DIV W 20.0M CH2 2.0V/DIV 1MΩ B 1.0MS/s
003
2.0MS/s W 20.0M CH2 3.0V/DIV 1MΩ B 1.0µs/pt W 500M 500ns/pt CH3 2.0V/DIV 1MΩ B
006
W 500M CH3 200mA/DIV 1MΩ B
09665-
W 20.0M CH4 5.0V/DIV 1MΩ BW 500M
09665- Figure 3. 3-Channel Start-Up Waveforms Figure 6. Buck Startup, VOUT1 = 3.3 V, IOUT2 = 20 mA
VOUT3 SW 4 4 VOUT2 2 VOUT1 2 VOUT1 1 EN 1 IIN IIN 3 3 CH1 2.0V/DIV 1MΩ B A CH1 1.08V 200µs/DIV W 20.0M CH1 8.0V/DIV 1MΩ B A CH1 1.12V 50µs/DIV W 20.0M CH2 5.0MS/s 2.0V/DIV 1MΩ B 2.0MS/s W 20.0M CH2 2.0V/DIV 1MΩ B 200ns/pt W 500.0M CH3 300mA/DIV 1MΩ B
004
500ns/pt W 20.0M CH3 200mA/DIV 1MΩ B
007
W 20.0M CH4 2.0V/DIV 1MΩ BW 20.0M CH4 5.0V/DIV 1MΩ B
09665-
W 500.0M
09665- Figure 4. Total Inrush Current, All Channels Started Simultaneously Figure 7. Buck Startup, VOUT1 = 1.8 V, IOUT = 20 mA
1.0 0.9 SW 0.8 4 0.7 0.6 VOUT1 mA) 0.5 2 ( I IN 0.4 EN 0.3 1 0.2 IIN 3 0.1 0 2.4 2.9 3.4 3.9 4.4 4.9 5.4 CH1 8.0V/DIV 1MΩ B A CH1 640mV 50µs/DIV
005
W 20.0M CH2 2.0MS/s 2.0V/DIV 1MΩ B V W 500.0M IN (V) 500ns/pt
09665-
CH3 200mA/DIV 1MΩ B
008
W 20.0M CH4 5.0V/DIV 1MΩ BW 500.0M
09665- Figure 5. System Quiescent Current (Sum of All the Input Currents) Figure 8. Buck Startup, VOUT1 = 1.2 V, IOUT = 20 mA vs. Input Voltage, VOUT1 = 1.8 V, VOUT2 = VOUT3 = 3.3 V (UVLO = 3.3 V) Rev. C | Page 8 of 37 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATIONS BUCK SPECIFICATIONS LDO1, LDO2 SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Thermal Protection Undervoltage Lockout Enable/Shutdown Active Pull-Down BUCK SECTION Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Short-Circuit Protection Soft Start Current Limit 100% Duty Operation LDO SECTION APPLICATIONS INFORMATION BUCK EXTERNAL COMPONENT SELECTION Feedback Resistors Inductor Output Capacitor Input Capacitor LDO EXTERNAL COMPONENT SELECTION Feedback Resistors Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties POWER DISSIPATION/THERMAL CONSIDERATIONS Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature APPLICATION DIAGRAM PCB LAYOUT GUIDELINES SUGGESTED LAYOUT BILL OF MATERIALS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
VIN1 = VIN2 = VIN3 = AVIN = 5.0 V, TA = 25°C, unless otherwise noted.
SW 4 VOUT1 2 VOUT1 2 VOUT2 3 EN VOUT3 4 1 IIN 3 CH4 2.0V/DIV 1MΩ BW 500M A CH2 1.88V 200µs/DIV CH1 4.0V/DIV 1MΩ B A CH1 2.32V 50µs/DIV W 20.0M CH2 2.0V/DIV 1MΩ B 1.0MS/s
003
2.0MS/s W 20.0M CH2 3.0V/DIV 1MΩ B 1.0µs/pt W 500M 500ns/pt CH3 2.0V/DIV 1MΩ B
006
W 500M CH3 200mA/DIV 1MΩ B
09665-
W 20.0M CH4 5.0V/DIV 1MΩ BW 500M
09665- Figure 3. 3-Channel Start-Up Waveforms Figure 6. Buck Startup, VOUT1 = 3.3 V, IOUT2 = 20 mA
VOUT3 SW 4 4 VOUT2 2 VOUT1 2 VOUT1 1 EN 1 IIN IIN 3 3 CH1 2.0V/DIV 1MΩ B A CH1 1.08V 200µs/DIV W 20.0M CH1 8.0V/DIV 1MΩ B A CH1 1.12V 50µs/DIV W 20.0M CH2 5.0MS/s 2.0V/DIV 1MΩ B 2.0MS/s W 20.0M CH2 2.0V/DIV 1MΩ B 200ns/pt W 500.0M CH3 300mA/DIV 1MΩ B
004
500ns/pt W 20.0M CH3 200mA/DIV 1MΩ B
007
W 20.0M CH4 2.0V/DIV 1MΩ BW 20.0M CH4 5.0V/DIV 1MΩ B
09665-
W 500.0M
09665- Figure 4. Total Inrush Current, All Channels Started Simultaneously Figure 7. Buck Startup, VOUT1 = 1.8 V, IOUT = 20 mA
1.0 0.9 SW 0.8 4 0.7 0.6 VOUT1 mA) 0.5 2 ( I IN 0.4 EN 0.3 1 0.2 IIN 3 0.1 0 2.4 2.9 3.4 3.9 4.4 4.9 5.4 CH1 8.0V/DIV 1MΩ B A CH1 640mV 50µs/DIV
005
W 20.0M CH2 2.0MS/s 2.0V/DIV 1MΩ B V W 500.0M IN (V) 500ns/pt
09665-
CH3 200mA/DIV 1MΩ B
008
W 20.0M CH4 5.0V/DIV 1MΩ BW 500.0M
09665- Figure 5. System Quiescent Current (Sum of All the Input Currents) Figure 8. Buck Startup, VOUT1 = 1.2 V, IOUT = 20 mA vs. Input Voltage, VOUT1 = 1.8 V, VOUT2 = VOUT3 = 3.3 V (UVLO = 3.3 V) Rev. C | Page 8 of 37 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL SPECIFICATIONS BUCK SPECIFICATIONS LDO1, LDO2 SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Thermal Protection Undervoltage Lockout Enable/Shutdown Active Pull-Down BUCK SECTION Control Scheme PWM Mode Power Save Mode (PSM) PSM Current Threshold Short-Circuit Protection Soft Start Current Limit 100% Duty Operation LDO SECTION APPLICATIONS INFORMATION BUCK EXTERNAL COMPONENT SELECTION Feedback Resistors Inductor Output Capacitor Input Capacitor LDO EXTERNAL COMPONENT SELECTION Feedback Resistors Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties POWER DISSIPATION/THERMAL CONSIDERATIONS Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature APPLICATION DIAGRAM PCB LAYOUT GUIDELINES SUGGESTED LAYOUT BILL OF MATERIALS FACTORY PROGRAMMABLE OPTIONS OUTLINE DIMENSIONS ORDERING GUIDE
