Datasheet LTC3544B (Analog Devices) - 3

LTC3544B e

lecTrical characTerisTics
The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VRUN(HIGH) RUNx Input High Voltage l 1.0 V VRUN(LOW) RUNx Input Low Voltage l 0.3 V ILSW SWx Leakage VRUN = 0V, VSW = 0V or 5.5V, VIN = 5.5V ±0.1 ±1 µA IRUN RUN Leakage Current VIN = 5.5V l ±0.1 ±1 µA IVFB VFBx Leakage Current 80 nA tSS Soft-Start Period VFB = 7.5% to 92.5% Full Scale 650 875 1200 µs VUVLO Undervoltage Lockout l 1.9 2.25 V
Individual Regulator Characteristics Regulator SW300 – 300mA
IPK Peak Switch Current Limit VFB < VFBREG, Duty Cycle < 35% 400 600 800 mA IS300 Input DC Bias Current–Reg SW300 Only VFB = 0.7V, ILOAD = 0A, 2.25MHz 320 µA Active Mode (Pulse Skip) RPFET RDS(ON) of P-Channel FET (Note 7) ISW = 100mA 0.55 Ω RNFET RDS(ON) of N-Channel FET (Note 7) ISW = –100mA 0.50 Ω
Regulator SW200A – 200mA
IPK Peak Switch Current Limit VFB < VFBREG, Duty Cycle < 35% 300 400 500 mA IS200 Input DC Bias Current–Reg SW200A Only VFB = 0.7V, ILOAD = 0A, 2.25MHz 320 µA Active Mode (Pulse Skip) RPFET RDS(ON) of P-Channel FET (Note 7) ISW = 100mA 0.65 Ω RNFET RDS(ON) of N-Channel FET (Note 7) ISW = –100mA 0.60 Ω
Regulator SW200B – 200mA
IPK Peak Switch Current Limit VFB < VFBREG, Duty Cycle < 35% 300 400 500 mA IS200 Input DC Bias Current–Reg SW200B Only VFB = 0.7V, ILOAD = 0A, 2.25MHz 320 µA Active Mode (Pulse Skip) RPFET RDS(ON) of P-Channel FET (Note 7) ISW = 100mA 0.65 Ω RNFET RDS(ON) of N-Channel FET (Note 7) ISW = –100mA 0.60 Ω
Regulator SW100 – 100mA
IPK Peak Switch Current Limit VFB < VFBREG, Duty Cycle < 35% 200 300 400 mA IS100 Input DC Bias Current–Reg SW100B Only VFB = 0.7V, ILOAD = 0A, 2.25MHz 320 µA Active Mode (Pulse Skip) RPFET RDS(ON) of P-Channel FET (Note 7) ISW = 100mA 0.80 Ω RNFET RDS(ON) of N-Channel FET (Note 7) ISW = –100mA 0.75 Ω
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 4:
This IC includes overtemperature protection that is intended may cause permanent damage to the device. Exposure to any Absolute to protect the device during momentary overload conditions. Junction Maximum Rating condition for extended periods may affect device temperature will exceed 125°C when overtemperature is active. reliability and lifetime. Continuous operation above the specified maximum operating junction
Note 2:
The LTC3544BE is guaranteed to meet performance specifications temperature may impair device reliability. from 0°C to 85°C. Specifications over the –40°C to 85°C operating
Note 5:
The LTC3544B is tested in a proprietary test mode that connects temperature range are assured by design, characterization and correlation VFB to the output of the error amplifier. with statistical process controls.
Note 6:
Load regulation is inferred by measuring the regulation loop gain.
Note 3:
TJ is calculated from the ambient temperature TA and power
Note 7:
The QFN switch on-resistance is guaranteed by correlation to dissipation PD according to the following formula: wafer level measurements. TJ = TA + (PD)(68°C/W).
Note 8:
Guaranteed by long-term current density limitations. 3544bfb Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagrams Operation Applications Information Package Description Revision History Related Parts