Datasheet LT8390 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | 60V Synchronous 4-Switch Buck-Boost Controller with Spread Spectrum |
| Pages / Page | 32 / 10 — PIN FUNCTIONS. BG1:. LOADEN:. BST1:. VREF:. SW1:. TG1:. CTRL:. LSP:. … |
| File Format / Size | PDF / 1.2 Mb |
| Document Language | English |
PIN FUNCTIONS. BG1:. LOADEN:. BST1:. VREF:. SW1:. TG1:. CTRL:. LSP:. LSN:. VIN:. INTVCC:. ISP:. ISN:. EN/UVLO:. ISMON:. PGOOD:. TEST:
Model Line for this Datasheet
Text Version of Document
LT8390
PIN FUNCTIONS BG1:
Buck Side Bottom Gate Drive. Drives the gate of buck
LOADEN:
Load Switch Enable Input. The LOADEN pin is side bottom N-channel MOSFET with a voltage swing from used to control the ON/OFF of the high side PMOS load ground to INTVCC. switch. If the load switch control is not used, tie this pin
BST1:
Buck Side Bootstrap Floating Driver Supply. The to VREF or INTVCC. Forcing the pin low turns off TG1 and BST1 pin has an integrated bootstrap Schottky diode from TG2, turns on BG1 and BG2, disconnects the VC pin from the INTV all internal loads, and turns off LOADTG. CC pin and requires an external bootstrap capacitor to the SW1 pin. The BST1 pin swings from a diode voltage
VREF:
Voltage Reference Output. The VREF pin provides an drop below INTVCC to (VIN + INTVCC). accurate 2V reference capable of supplying 1mA current.
SW1:
Buck Side Switch Node. The SW1 pin swings from Locally bypass this pin to ground with a 0.47µF ceramic a Schottky diode voltage drop below ground up to V capacitor. IN.
TG1:
Buck Side Top Gate Drive. Drives the gate of buck
CTRL:
Control Input for ISP/ISN Current Sense Threshold. side top N-channel MOSFET with a voltage swing from The CTRL pin is used to program the ISP/ISN current limit: SW1 to BST1. Min(V ) I CTRL − 0.25V,1V
LSP:
Positive Terminal of the Buck Side Inductor Current IS(MAX) =
10 •RIS Sense Resistor (RSENSE). Ensure accurate current sense with Kelvin connection. The VCTRL can be set by an external voltage reference or a resistor divider from V
LSN:
Negative Terminal of the Buck Side Inductor Current REF to ground. For 0.3V ≤ VCTRL ≤ 1.15V, the current sense threshold linearly goes up Sense Resistor (RSENSE). Ensure accurate current sense from 5mV to 90mV. For V with Kelvin connection. CTRL ≥ 1.35V, the current sense threshold is constant at 100mV full scale value. For 1.15V
VIN:
Input Supply. The VIN pin must be tied to the power ≤ VCTRL ≤ 1.35V, the current sense threshold smoothly input to determine the buck, buck-boost, or boost operation transitions from the linear function of VCTRL to the 100mV regions. Locally bypass this pin to ground with a minimum constant value. Tie CTRL to VREF for the 100mV full scale 1µF ceramic capacitor. threshold. Force the pin below 0.3V to stop switching.
INTVCC:
Internal 5V Linear Regulator Output. The INTVCC
ISP:
Positive Terminal of the ISP/ISN Current Sense Re- linear regulator is supplied from the VIN pin, and powers the sistor (RIS). Ensure accurate current sense with Kelvin internal control circuitry and gate drivers. Locally bypass connection. this pin to ground with a minimum 4.7µF ceramic capacitor.
ISN:
Negative Terminal of the ISP/ISN Current Sense
EN/UVLO:
Enable and Undervoltage Lockout. Force the pin Resistor (RIS). Ensure accurate current sense with Kelvin below 0.3V to shut down the part and reduce VIN quiescent connection. current below 2µA. Force the pin above 1.233V for normal
ISMON:
ISP/ISN Current Sense Monitor Output. The ISMON operation. The accurate 1.220V falling threshold can be used pin generates a voltage that is equal to ten times V to program an undervoltage lockout (UVLO) threshold with (ISP-ISN) plus 0.25V offset voltage. For parallel applications, tie the a resistor divider from VIN to ground. An accurate 2.5µA master LT8390 ISMON pin to the slave LT8390 CTRL pin. pull-down current allows the programming of VIN UVLO hys- teresis. If neither function is used, tie this pin directly to VIN.
PGOOD:
Power Good Open Drain Output. The PGOOD pin is pulled low when the FB pin is within ±10% of the
TEST:
Factory Test. This pin is used for testing purpose final regulation voltage. To function, the pin requires an only and must be directly connected to ground for the external pull-up resistor. part to operate properly. 8390fa 10 For more information www.linear.com/LT8390 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS BG1:
Buck Side Bottom Gate Drive. Drives the gate of buck
LOADEN:
Load Switch Enable Input. The LOADEN pin is side bottom N-channel MOSFET with a voltage swing from used to control the ON/OFF of the high side PMOS load ground to INTVCC. switch. If the load switch control is not used, tie this pin
BST1:
Buck Side Bootstrap Floating Driver Supply. The to VREF or INTVCC. Forcing the pin low turns off TG1 and BST1 pin has an integrated bootstrap Schottky diode from TG2, turns on BG1 and BG2, disconnects the VC pin from the INTV all internal loads, and turns off LOADTG. CC pin and requires an external bootstrap capacitor to the SW1 pin. The BST1 pin swings from a diode voltage
VREF:
Voltage Reference Output. The VREF pin provides an drop below INTVCC to (VIN + INTVCC). accurate 2V reference capable of supplying 1mA current.
SW1:
Buck Side Switch Node. The SW1 pin swings from Locally bypass this pin to ground with a 0.47µF ceramic a Schottky diode voltage drop below ground up to V capacitor. IN.
TG1:
Buck Side Top Gate Drive. Drives the gate of buck
CTRL:
Control Input for ISP/ISN Current Sense Threshold. side top N-channel MOSFET with a voltage swing from The CTRL pin is used to program the ISP/ISN current limit: SW1 to BST1. Min(V ) I CTRL − 0.25V,1V
LSP:
Positive Terminal of the Buck Side Inductor Current IS(MAX) =
10 •RIS Sense Resistor (RSENSE). Ensure accurate current sense with Kelvin connection. The VCTRL can be set by an external voltage reference or a resistor divider from V
LSN:
Negative Terminal of the Buck Side Inductor Current REF to ground. For 0.3V ≤ VCTRL ≤ 1.15V, the current sense threshold linearly goes up Sense Resistor (RSENSE). Ensure accurate current sense from 5mV to 90mV. For V with Kelvin connection. CTRL ≥ 1.35V, the current sense threshold is constant at 100mV full scale value. For 1.15V
VIN:
Input Supply. The VIN pin must be tied to the power ≤ VCTRL ≤ 1.35V, the current sense threshold smoothly input to determine the buck, buck-boost, or boost operation transitions from the linear function of VCTRL to the 100mV regions. Locally bypass this pin to ground with a minimum constant value. Tie CTRL to VREF for the 100mV full scale 1µF ceramic capacitor. threshold. Force the pin below 0.3V to stop switching.
INTVCC:
Internal 5V Linear Regulator Output. The INTVCC
ISP:
Positive Terminal of the ISP/ISN Current Sense Re- linear regulator is supplied from the VIN pin, and powers the sistor (RIS). Ensure accurate current sense with Kelvin internal control circuitry and gate drivers. Locally bypass connection. this pin to ground with a minimum 4.7µF ceramic capacitor.
ISN:
Negative Terminal of the ISP/ISN Current Sense
EN/UVLO:
Enable and Undervoltage Lockout. Force the pin Resistor (RIS). Ensure accurate current sense with Kelvin below 0.3V to shut down the part and reduce VIN quiescent connection. current below 2µA. Force the pin above 1.233V for normal
ISMON:
ISP/ISN Current Sense Monitor Output. The ISMON operation. The accurate 1.220V falling threshold can be used pin generates a voltage that is equal to ten times V to program an undervoltage lockout (UVLO) threshold with (ISP-ISN) plus 0.25V offset voltage. For parallel applications, tie the a resistor divider from VIN to ground. An accurate 2.5µA master LT8390 ISMON pin to the slave LT8390 CTRL pin. pull-down current allows the programming of VIN UVLO hys- teresis. If neither function is used, tie this pin directly to VIN.
PGOOD:
Power Good Open Drain Output. The PGOOD pin is pulled low when the FB pin is within ±10% of the
TEST:
Factory Test. This pin is used for testing purpose final regulation voltage. To function, the pin requires an only and must be directly connected to ground for the external pull-up resistor. part to operate properly. 8390fa 10 For more information www.linear.com/LT8390 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
