Datasheet ADSP-21261, ADSP-21262, ADSP-21266 (Analog Devices) - 8

ManufacturerAnalog Devices
DescriptionSHARC Embedded Processor
Pages / Page48 / 8 — ADSP-21261/. ADSP-21262/. ADSP-21266. TARGET BOARD JTAG EMULATOR …
RevisionG
File Format / SizePDF / 955 Kb
Document LanguageEnglish

ADSP-21261/. ADSP-21262/. ADSP-21266. TARGET BOARD JTAG EMULATOR CONNECTOR. Software Add-Ins for CrossCore Embedded Studio

ADSP-21261/ ADSP-21262/ ADSP-21266 TARGET BOARD JTAG EMULATOR CONNECTOR Software Add-Ins for CrossCore Embedded Studio

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ADSP-21261/ ADSP-21262/ ADSP-21266 TARGET BOARD JTAG EMULATOR CONNECTOR
The USB controller on the EZ-KIT Lite board connects to the USB port of the user’s PC, enabling the chosen IDE evaluation Analog Devices DSP Tools product line of JTAG emulators uses suite to emulate the on-board processor in-circuit. This permits the IEEE 1149.1 JTAG test access port of the ADSP-2126x pro- the customer to download, execute, and debug programs for the cessor to monitor and control the target board processor during EZ-KIT Lite system. It also supports in-circuit programming of emulation. Analog Devices DSP Tools product line of JTAG the on-board Flash device to store user-specific boot code, emulators provides emulation at full processor speed, allowing enabling standalone operation. With the full version of Cross- inspection and modification of memory, registers, and proces- Core Embedded Studio or VisualDSP++ installed (sold sor stacks. The processor’s JTAG interface ensures that the separately), engineers can develop software for supported EZ- emulator will not affect target system loading or timing. KITs or any custom system utilizing supported Analog Devices For complete information on Analog Devices SHARC DSP processors. Tools product line of JTAG emulator operation, see the appro- priate emulator hardware user’s guide.
Software Add-Ins for CrossCore Embedded Studio
Analog Devices offers software add-ins which seamlessly inte-
DEVELOPMENT TOOLS
grate with CrossCore Embedded Studio to extend its capabilities Analog Devices supports its processors with a complete line of and reduce development time. Add-ins include board support software and hardware development tools, including integrated packages for evaluation hardware, various middleware pack- development environments (which include CrossCore® Embed- ages, and algorithmic modules. Documentation, help, ded Studio and/or VisualDSP++®), evaluation products, configuration dialogs, and coding examples present in these emulators, and a wide variety of software add-ins. add-ins are viewable through the CrossCore Embedded Studio IDE once the add-in is installed.
Integrated Development Environments (IDEs) Board Support Packages for Evaluation Hardware
For C/C++ software writing and editing, code generation, and debug support, Analog Devices offers two IDEs. Software support for the EZ-KIT Lite evaluation boards and EZ- The newest IDE, CrossCore Embedded Studio, is based on the Extender daughter cards is provided by software add-ins called EclipseTM framework. Supporting most Analog Devices proces- Board Support Packages (BSPs). The BSPs contain the required sor families, it is the IDE of choice for future processors, drivers, pertinent release notes, and select example code for the including multicore devices. CrossCore Embedded Studio given evaluation hardware. A download link for a specific BSP is seamlessly integrates available software add-ins to support real located on the web page for the associated EZ-KIT or EZ- time operating systems, file systems, TCP/IP stacks, USB stacks, Extender product. The link is found in the Product Download algorithmic software modules, and evaluation hardware board area of the product web page. support packages. For more information visit
Middleware Packages
www.analog.com/cces. Analog Devices separately offers middleware add-ins such as The other Analog Devices IDE, VisualDSP++, supports proces- real time operating systems, file systems, USB stacks, and sor families introduced prior to the release of CrossCore TCP/IP stacks. For more information see the following web Embedded Studio. This IDE includes the Analog Devices VDK pages: real time operating system and an open source TCP/IP stack. For more information visit www.analog.com/visualdsp. Note • www.analog.com/ucos3 that VisualDSP++ will not support future Analog Devices • www.analog.com/ucfs processors. • www.analog.com/ucusbd
EZ-KIT Lite Evaluation Board
• www.analog.com/lwip For processor evaluation, Analog Devices provides wide range
Algorithmic Modules
of EZ-KIT Lite® evaluation boards. Including the processor and key peripherals, the evaluation board also supports on-chip To speed development, Analog Devices offers add-ins that per- emulation capabilities and other evaluation and development form popular audio and video processing algorithms. These are features. Also available are various EZ-Extenders®, which are available for use with both CrossCore Embedded Studio and daughter cards delivering additional specialized functionality, VisualDSP++. For more information visit www.analog.com and including audio and video processing. For more information search on “Blackfin software modules” or “SHARC software visit www.analog.com and search on “ezkit” or “ezextender”. modules”.
EZ-KIT Lite Evaluation Kits Designing an Emulator-Compatible DSP Board (Target)
For a cost-effective way to learn more about developing with For embedded system test and debug, Analog Devices provides Analog Devices processors, Analog Devices offer a range of EZ- a family of emulators. On each JTAG DSP, Analog Devices sup- KIT Lite evaluation kits. Each evaluation kit includes an EZ-KIT plies an IEEE 1149.1 JTAG Test Access Port (TAP). In-circuit Lite evaluation board, directions for downloading an evaluation emulation is facilitated by use of this JTAG interface. The emu- version of the available IDE(s), a USB cable, and a power supply. lator accesses the processor’s internal features via the processor’s TAP, allowing the developer to load code, set Rev. G | Page 8 of 48 | December 2012 Document Outline Summary Table of Contents Revision History General Description Family Core Architecture SIMD Computational Engine Independent, Parallel Computation Units Data Register File Single-Cycle Fetch of Instruction and Four Operands Instruction Cache Data Address Generators with Zero-Overhead Hardware Circular Buffer Support Flexible Instruction Set Memory and I/O Interface Features Dual-Ported On-Chip Memory DMA Controller Digital Application Interface (DAI) Serial Ports Serial Peripheral (Compatible) Interface Parallel Port Timers ROM-Based Security Program Booting Phase-Locked Loop Power Supplies Target Board JTAG Emulator Connector Development Tools Integrated Development Environments (IDEs) EZ-KIT Lite Evaluation Board EZ-KIT Lite Evaluation Kits Software Add-Ins for CrossCore Embedded Studio Board Support Packages for Evaluation Hardware Middleware Packages Algorithmic Modules Designing an Emulator-Compatible DSP Board (Target) Additional Information Related Signal Chains Pin Function Descriptions Address Data Pins as Flags Boot Modes Core Instruction Rate to CLKIN Ratio Modes Address Data Modes Product Specifications Operating Conditions Electrical Characteristics Package Information ESD Caution Maximum Power Dissipation Absolute Maximum Ratings Timing Specifications Core Clock Requirements Voltage Controlled Oscillator Power-Up Sequencing Clock Input Clock Signals Reset Interrupts Core Timer Timer PWM_OUT Cycle Timing Timer WDTH_CAP Timing DAI Pin-to-Pin Direct Routing Precision Clock Generator (Direct Pin Routing) Flags Memory Read—Parallel Port Memory Write—Parallel Port Serial Ports Input Data Port (IDP) Parallel Data Acquisition Port (PDAP) SPI Interface Protocol—Master SPI Interface Protocol—Slave JTAG Test Access Port and Emulation Output Drive Currents Test Conditions Capacitive Loading Environmental Conditions Thermal Characteristics 144-Lead LQFP Pin Configurations 136-Ball BGA Pin Configurations Outline Dimensions Surface-Mount Design Automotive Products Ordering Guide
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