Datasheet A80603, A80603-1 (Allegro) - 10
| Manufacturer | Allegro |
| Description | LED Driver with Pre-Emptive Boost for Ultra-High Dimming Ratio and Low Output Ripple |
| Pages / Page | 30 / 10 — A80603 and. LED Driver with Pre-Emptive Boost. A80603-1 for Ultra-High … |
| File Format / Size | PDF / 4.6 Mb |
| Document Language | English |
A80603 and. LED Driver with Pre-Emptive Boost. A80603-1 for Ultra-High Dimming Ratio and Low Output Ripple
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A80603 and LED Driver with Pre-Emptive Boost A80603-1 for Ultra-High Dimming Ratio and Low Output Ripple Powering Up: LED Detection Phase
VOUT VOUT The VIN pin has an undervoltage lockout (UVLO) function that prevents the A80603 from powering up until the UVLO threshold is Using LED Using all LED Channels 1-3 Channels reached. Once the VIN pin goes above UVLO and a high signal is present on the EN pin, the IC proceeds to power up. At this point, the LED1 LED1 A80603 is going to enable the disconnect switch and will try to check LED2 LED2 LED3 LED3 if any LED pins are shorted to GND and/or are not used. The LED LED4 LED4 GND GND detection phase starts when PWM = H and the GATE voltage of the 6.19 kΩ input disconnect PMOS switch is pulled down to 3.3 V below VIN.
Figure 6: How to signal an unused LED channel during startup LED detection phase Table 1: LED Detection phase voltage threshold levels LED Pin Voltage Measured Interpretation Outcome
Cannot proceed with < 120 mV LED pin shorted to GND fault soft-start unless fault is removed LED channel is ~ 230 mV LED channel not in use removed from operation > 340 mV LED channel in use Proceed with soft-start
Figure 5: Startup showing EN+PWM, GATE, LED1, and ISET. Switching frequency = 2.15 MHz. Note that LED Detection Phase starts as soon as GATE pin is pulled down to 3.3 V below VIN (provided that PWM = H).
Once the voltage threshold on VLED pins exceeds ~120 mV, a delay of approximately 1.5 ms is used to determine the status of the pins. Unused LED pin should be terminated with a 6.19 kΩ resistor to GND. At the end of LED detection phase, any channel with pull down resistor is then disabled and will not contribute to the boost regulation loop.
Figure 7: A80603 normal startup showing all channels passed LED Detection phase. Total LED current = 100 mA × 4 (only LED1 and LED2 pin voltages are shown).
Allegro MicroSystems, LLC 10 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Applications Package Selection Guide Absolute Maximum Ratings Thermal Characteristics Typical Application – SEPIC Functional Block Diagram Pinout Diagram and Terminal List Electrical Characteristics Functional Description Enabling the IC Powering Up: LED Detection Phase Powering Up: Boost Output Undervoltage Soft Start Function Frequency Selection Synchronization Loss of External Sync Signal Switching Frequency Dithering Clock Out Function LED Current Setting PWM Dimming Pre-Emptive Boost (PEB) Analog Dimming with APWM Pin Extending LED Dimming Ratio Analog Dimming with External Voltage VDD Shutdown Fault Detection and Protection LED String Partial-Short Detect Overvoltage Protection Boost Switch Overcurrent Protection Input Overcurrent Protection and Disconnect Switch Setting the Current Sense Resistor Input UVLO Fault Protection During Operation Fault Recovery Mechanism Package Outline Drawing
VOUT VOUT The VIN pin has an undervoltage lockout (UVLO) function that prevents the A80603 from powering up until the UVLO threshold is Using LED Using all LED Channels 1-3 Channels reached. Once the VIN pin goes above UVLO and a high signal is present on the EN pin, the IC proceeds to power up. At this point, the LED1 LED1 A80603 is going to enable the disconnect switch and will try to check LED2 LED2 LED3 LED3 if any LED pins are shorted to GND and/or are not used. The LED LED4 LED4 GND GND detection phase starts when PWM = H and the GATE voltage of the 6.19 kΩ input disconnect PMOS switch is pulled down to 3.3 V below VIN.
Figure 6: How to signal an unused LED channel during startup LED detection phase Table 1: LED Detection phase voltage threshold levels LED Pin Voltage Measured Interpretation Outcome
Cannot proceed with < 120 mV LED pin shorted to GND fault soft-start unless fault is removed LED channel is ~ 230 mV LED channel not in use removed from operation > 340 mV LED channel in use Proceed with soft-start
Figure 5: Startup showing EN+PWM, GATE, LED1, and ISET. Switching frequency = 2.15 MHz. Note that LED Detection Phase starts as soon as GATE pin is pulled down to 3.3 V below VIN (provided that PWM = H).
Once the voltage threshold on VLED pins exceeds ~120 mV, a delay of approximately 1.5 ms is used to determine the status of the pins. Unused LED pin should be terminated with a 6.19 kΩ resistor to GND. At the end of LED detection phase, any channel with pull down resistor is then disabled and will not contribute to the boost regulation loop.
Figure 7: A80603 normal startup showing all channels passed LED Detection phase. Total LED current = 100 mA × 4 (only LED1 and LED2 pin voltages are shown).
Allegro MicroSystems, LLC 10 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Applications Package Selection Guide Absolute Maximum Ratings Thermal Characteristics Typical Application – SEPIC Functional Block Diagram Pinout Diagram and Terminal List Electrical Characteristics Functional Description Enabling the IC Powering Up: LED Detection Phase Powering Up: Boost Output Undervoltage Soft Start Function Frequency Selection Synchronization Loss of External Sync Signal Switching Frequency Dithering Clock Out Function LED Current Setting PWM Dimming Pre-Emptive Boost (PEB) Analog Dimming with APWM Pin Extending LED Dimming Ratio Analog Dimming with External Voltage VDD Shutdown Fault Detection and Protection LED String Partial-Short Detect Overvoltage Protection Boost Switch Overcurrent Protection Input Overcurrent Protection and Disconnect Switch Setting the Current Sense Resistor Input UVLO Fault Protection During Operation Fault Recovery Mechanism Package Outline Drawing
