Datasheet ADUM5230 (Analog Devices) - 10

ManufacturerAnalog Devices
DescriptionIsolated Half-Bridge Driver with Integrated High-Side Supply
Pages / Page15 / 10 — ADuM5230. Data Sheet. APPLICATIONS INFORMATION THEORY OF OPERATION. GND1. …
RevisionC
File Format / SizePDF / 779 Kb
Document LanguageEnglish

ADuM5230. Data Sheet. APPLICATIONS INFORMATION THEORY OF OPERATION. GND1. VOA. VDD1. VISO. GND. ADJ. ISO. DNC. TOP VIEW. VIA. (Not to Scale). VIB

ADuM5230 Data Sheet APPLICATIONS INFORMATION THEORY OF OPERATION GND1 VOA VDD1 VISO GND ADJ ISO DNC TOP VIEW VIA (Not to Scale) VIB

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ADuM5230 Data Sheet APPLICATIONS INFORMATION THEORY OF OPERATION GND1 VOA
The dc-to-dc converter section of the ADuM5230 works on
VDD1 VISO V GND
principles that are common to most modern power supply
ADJ ISO ADuM5230 GND1 DNC
designs. It is implemented as an open-loop PWM controller,
TOP VIEW VIA (Not to Scale) DNC
which sets the power level being transferred to the secondary.
VIB GNDB
V
V
DD1 power is supplied to an oscillating circuit that switches
DD1 VDDB
current into a chip-scale air core transformer. On the secondary
GND1 VOB
022 0- side, power is rectified to a dc voltage. The voltage is then 0708
DNC = DO NOT CONNECT
clamped to approximately 18 V and provided to the secondary Figure 15. Recommended Printed Circuit Board Layout side VOA data channel and to the VISO pin for external use. The output voltage is unregulated and varies with load. In applications involving high common-mode transients, care should be taken to ensure that board coupling across the isolation The PWM duty cycle is set by internal bias elements, but can barrier is minimized. Furthermore, the board layout should be be controlled externally through the VADJ pin with an external designed such that any coupling that does occur equally affects resistor network. This feature allows the user to boost the all pins on a given component side. Failure to ensure this may available power at the secondary, or reduce excess power if it is cause voltage differentials between pins exceeding the absolute not required for the application (see the Power Consumption maximum ratings specified in Table 6, leading to latch-up section). and/or permanent damage. Undervoltage lockouts are provided on the VDD1, VDDB, and VISO The ADuM5230 is a power device that dissipates about 1 W of supply lines to interlock the data channels from low supply power when fully loaded and run at maximum speed. Because it voltages. is not possible to apply a heat sink to an isolation device, the device
PRINTED CIRCUIT BOARD (PCB) LAYOUT
primarily depends on heat dissipation into the PCB through the GND pins. If the device is used at high ambient temperatures, The ADuM5230 digital isolator with a 150 mW isoPower® care should be taken to provide a thermal path from the GND integrated dc-to-dc converter requires no external interface pins to the PCB ground plane. The board layout in Figure 15 circuitry for the logic interfaces. Power supply bypassing is shows enlarged pads for Pin 1 and Pin 8. Implement multiple required at the input and output supply pins (see Figure 15). vias from the pad to the ground plane, which significantly The power supply section of the ADuM5230 uses a very high reduce the temperatures inside the chip. The dimensions of the oscillator frequency to pass power efficiently through its chip expanded pads are left to the discretion of the designer and the scale transformers. In addition, the normal operation of the available board space. data section of the iCoupler® introduces switching transients on the power supply pins. Bypass capacitors are required for
THERMAL ANALYSIS
several operating frequencies. Noise suppression requires a low The ADuM5230 part consists of several internal die attached to inductance high frequency capacitor; ripple suppression and three lead frames, each with a die attach paddle. For the purposes proper regulation require a large value capacitor. These are of thermal analysis, the device is treated as a thermal unit with most conveniently connected between Pin 1 and Pin 2 for VDD1 the highest junction temperature reflected in the θJA parameter and between Pin 15 and Pin 14 for VISO. To suppress noise and shown in Table 2. The value of θJA is based on measurements reduce ripple, a parallel combination of at least two capacitors taken with the part mounted on a JEDEC standard four-layer is required. The recommended capacitor values are 0.1 μF and board with fine width traces and still air. Under normal operating 10 μF. It is strongly recommended that a very low inductance conditions, the ADuM5230 operates at full load across the full ceramic or equivalent capacitor be used for the smaller value. temperature range without derating the output current. However, The total lead length between both ends of the capacitor and following the recommendations in the Printed Circuit Board the input power supply pin should not exceed 20 mm. Bypassing (PCB) Layout section decreases the thermal resistance to the with noise suppression and stiffening capacitors is recommended PCB, allowing increased thermal margin in high ambient between Pin 1 and Pin 2, a bypass capacitor is recommended temperatures. between Pin 7 and Pin 8. Bypassing with noise suppression and stiffening capacitors is recommended between Pin 14 and Pin 15. Under output short-circuit conditions, as shown in Figure 12, the package power dissipation is within safe operating limits; See the AN-0971 Application Note for board layout guidelines however, if the load is in the 100 Ω range, power dissipation is and reduction of radiated emissions. high enough to cause thermal damage when the ambient temperature is above 80°C. Care should be taken to avoid excessive nonshort loads if the part is to be operated at high temperatures. Rev. C | Page 10 of 15 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS PACKAGE CHARACTERISTICS REGULATORY INFORMATION INSULATION AND SAFETY-RELATED SPECIFICATIONS RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFOMANCE CHARACTERISTICS APPLICATIONS INFORMATION THEORY OF OPERATION PRINTED CIRCUIT BOARD (PCB) LAYOUT THERMAL ANALYSIS PROPAGATION DELAY-RELATED PARAMETERS DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY POWER CONSUMPTION INCREASING AND DECREASING AVAILABLE POWER COMMON-MODE TRANSIENT IMMUNITY TYPICAL APPLICATION USAGE INSULATION LIFETIME OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS
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