Datasheet ACS724KMA (Allegro) - 21
| Manufacturer | Allegro |
| Description | High-Accuracy, Hall-Effect-Based Current Sensor IC with Common-Mode Field Rejection in Reinforced-Isolation SOICW-16 Package |
| Pages / Page | 22 / 21 — High-Accuracy, Hall-Effect-Based Current Sensor IC. ACS724KMA |
| File Format / Size | PDF / 1.4 Mb |
| Document Language | English |
High-Accuracy, Hall-Effect-Based Current Sensor IC. ACS724KMA
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High-Accuracy, Hall-Effect-Based Current Sensor IC ACS724KMA with Common-Mode Field Rejection in High-Isolation SOIC16 Package PACKAGE OUTLINE DRAWING For Reference Only – Not for Tooling Use
(Reference MS-013AA) NOT TO SCALE Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown 10.30 ±0.20 8° 0° 16 0.33 0.20 7.50 ±0.10 10.30 ±0.33 A 1.27 1.40 REF 0.40 1 2 Branded Face 0.25 BSC SEATING PLANE 16X C 2.65 MAX GAUGE PLANE 0.10 C SEATING PLANE 1.27 BSC 0.30 0.51 0.10 0.31 0.65 1.27 16 NNNNNNN 2.25 LLLLLLLL 1 B Standard Branding Reference View 9.50 N = Device part number L = Assembly Lot Number, first eight characters A Terminal #1 mark area B Branding scale and appearance at supplier discretion 1 2 C Reference land pattern layout (reference IPC7351 SOIC127P600X175-8M); C PCB Layout Reference View all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances
Figure 8: Package MA, 16-Pin SOICW
21 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com
(Reference MS-013AA) NOT TO SCALE Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown 10.30 ±0.20 8° 0° 16 0.33 0.20 7.50 ±0.10 10.30 ±0.33 A 1.27 1.40 REF 0.40 1 2 Branded Face 0.25 BSC SEATING PLANE 16X C 2.65 MAX GAUGE PLANE 0.10 C SEATING PLANE 1.27 BSC 0.30 0.51 0.10 0.31 0.65 1.27 16 NNNNNNN 2.25 LLLLLLLL 1 B Standard Branding Reference View 9.50 N = Device part number L = Assembly Lot Number, first eight characters A Terminal #1 mark area B Branding scale and appearance at supplier discretion 1 2 C Reference land pattern layout (reference IPC7351 SOIC127P600X175-8M); C PCB Layout Reference View all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances
Figure 8: Package MA, 16-Pin SOICW
21 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com