AP3917COperation Description (continued) Open-Loop Detection When the FB voltage drops below open-loop detection threshold voltage VOLD (60mV), the AP3917C stops working and begins a restart cycle. The open-loop detection is blanked for 64 switching cycles during startup process. Overshoot Improvement In general, there is no capacitor between FB pin and S pin. But in some cases where strict overshoot is required, we recommend a ceramic capacitor C6 (390pF to 1nF) in Figure 5. T C R1 D2 U C3 D C2 C6 O R2 R L2 P BP S VO+ W FB S E NC N Drain NC AP3917C Figure 5. Overshoot Improvement Leading-Edge Blanking A narrow spike on the leading edge of the current waveform can usually be observed when the power MOSFET is turned on. Normally, the leading-edge blanking time tLEB1 is built in to prevent the false-triggering caused by the turn-on spike. But in the case of short circuit, the leading- edge blanking time is tLEB2. During this period, the current limit comparator is disabled, and the gate driver cannot be switched off. Ordering InformationAP3917C X - X Product Name Package Packing S7 : SO-7 13 : 13" Tape & Reel PackagePart NumberMarking IDPacking SO-7 AP3917CS7-13 3917C 4000/Tape & Reel Marking InformationPackage Type: SO-7(Top View) Logo YY : Year : 19, 20, 21~ Marking ID 3917C WW : Week : 01~52; 52 represents 52 and 53 week YY WW X X X X : Internal Code