Datasheet ADL5315 (Analog Devices) - 10

ManufacturerAnalog Devices
DescriptionPrecision Wide-range (3 nA - 3 mA) High-Side Current Mirror
Pages / Page17 / 10 — ADL5315. Data Sheet. MIRROR RESPONSE TIME. INPUT CURRENT LIMITING. NOISE …
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ADL5315. Data Sheet. MIRROR RESPONSE TIME. INPUT CURRENT LIMITING. NOISE PERFORMANCE

ADL5315 Data Sheet MIRROR RESPONSE TIME INPUT CURRENT LIMITING NOISE PERFORMANCE

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ADL5315 Data Sheet
The VSET control is intended primarily to provide a dc bias
MIRROR RESPONSE TIME
voltage for the mirror input, but it is also well behaved in the The response time of IOUT to changes in IINPT is fundamentally a presence of the VSET transients. The rise time of VINPT is largely function of input current, with smal -signal bandwidth increasing independent of input current because the mirror is capable of roughly in proportion to IINPT (see Figure 10). The value of the sourcing large currents to pull up the INPT pin. The fall time, external compensating capacitor on INPT strongly affects the however, is inversely proportional to IINPT because only IINPT is IOUT response time (as well as the VSET to VINPT fall time, as noted available to discharge the input compensation capacitor and in the Bias Control Interface section), although the value must other parasitics (see Figure 11). The mirror output current can be chosen to maintain stability and prevent noise peaking. vary significantly from zero to several milliamps until VINPT is fully settled.
INPUT CURRENT LIMITING NOISE PERFORMANCE
The ADL5315 provides a resistor-programmable input current limit with a fixed maximum of 16 mA for the RLIM pin tied to The noise performance for the ADL5315, defined as the rms VPOS. The fixed maximum provides input short-circuit protection noise current as a fraction of the output dc current, generally to ground. The current limit is defined as the current that forces improves with increasing signal current. This partially results VINPT to 0 V (when using a current source on the INPT pin). from the relationship between the quiescent col ector current Resistor RLIM between the VPOS and RLIM pins controls the and the shot noise in the bipolar transistors. At lower signal current limit according to current levels, the noise contribution from the JFET amplifier and other voltage noise sources appearing at INPT contribute V 48 I = LIM significantly to the current noise. Filtering noise at VSET, R + LIM 3kΩ whether provided by SREF or generated external y, as well as selecting optimal external compensation components on INPT, over an RLIM range of 0 to 45 kΩ, corresponding to 16 mA down minimizes the amount of current noise at IOUT generated by to 1 mA. Larger values of RLIM can be used for currents below the voltage noise at INPT. 1 mA (down to approximately 250 µA) with some degradation in accuracy. See Figure 14 for more performance detail. Rev. A | Page 10 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BIAS CONTROL INTERFACE NOISE PERFORMANCE MIRROR RESPONSE TIME INPUT CURRENT LIMITING APPLICATIONS AVERAGE POWER MONITORING TRANSLINEAR LOG AMP INTERFACING EXTENDED OPERATING RANGE USING RLIM AS A SECONDARY MONITOR CHARACTERIZATION METHODS EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE
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