Product Brief PIC18 Q43 (Microchip) - 4

ManufacturerMicrochip
DescriptionPIC18 Q43 combines our most popular, versatile and easy to use Core Independent Peripherals with advanced interconnection capabilities that make sophisticated hardware customization effortless
Pages / Page20 / 4 — PIC18 Q43. Product Brief
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Document LanguageEnglish

PIC18 Q43. Product Brief

PIC18 Q43 Product Brief

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PIC18 Q43
• Three Numerically Controlled Oscillators (NCO): – Generates true linear frequency control and increased frequency resolution – Input Clock up to 64 MHz • Signal Measurement Timer (SMT): – 24-bit timer/counter with prescaler – Several modes of operation like Time-of-Flight, Period and Duty Cycle measurement etc. • Data Signal Modulator (DSM): – Multiplex two carrier clocks, with glitch prevention feature – Multiple sources for each carrier • Programmable CRC with Memory Scan: – Reliable data/program memory monitoring for Fail-Safe operation (e.g., Class B) – Calculate 16-bit CRC over any portion of Program Flash Memory • Five UART modules: – One module (UART1) supports LIN master and slave, DMX mode, DALI gear and device protocols – Asynchronous UART, RS-232, RS-485 compatible – Automatic and user timed BREAK period generation – Automatic checksums – Programmable 1, 1.5, and two Stop bits – Wake-up on BREAK reception – DMA compatible • Two SPI modules: – Configurable length bytes – Arbitrary length data packets – Transmit-without-Receive and Receive-without-transmit option – Transfer byte counter – Separate transmit and receive buffers with 2-byte FIFO and DMA capabilities • One I2C module, SMBus, PMBus™ Compatible: – 7-bit and 10-bit addressing modes with address masking modes – Dedicated address, transmit and receive buffers and DMA capabilities – Bus collision detection with arbitration – Bus time-out detection and handling – I2C, SMBus 2.0 and SMBus 3.0, and 1.8V input level selections – Multi-Master mode, including self-addressing • Device I/O Port Features: – 25 I/O pins (PIC18F25/26/27Q43) – 36 I/O pins (PIC18F45/46/47Q43) – 44 I/O pins (PIC18F55/56/57Q43) – Individually programmable I/O direction, open-drain, slew rate and weak pull-up control – Interrupt-on-change on most pins – Three programmable external interrupt pins • Peripheral Pin Select (PPS): – Enables pin mapping of digital I/O © 2019 Microchip Technology Inc.
Product Brief
DS40002069B-page 4 Document Outline Description PIC18 Q43 Family Types Core Features Memory Operating Characteristics Power-Saving Functionality Digital Peripherals Analog Peripherals Clocking Structure Programming/Debug Features Packages Pin Diagrams Pin Allocation Tables Table of Contents The Microchip Web Site Customer Change Notification Service Customer Support Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Certified by DNV Worldwide Sales and Service
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