Datasheet 2ED2183 (4) S06F (J) (Infineon) - 5
| Manufacturer | Infineon |
| Description | 650 V half-bridge gate driver with integrated bootstrap diode |
| Pages / Page | 24 / 5 — HIN. LIN. VSS. COM. VCC |
| Revision | 02_01 |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
HIN. LIN. VSS. COM. VCC
Model Line for this Datasheet
Text Version of Document
2ED2183 (4) S06F (J) 650 V half-bridge gate driver with integrated bootstrap diode 3
Pin configuration and functionality 3.1
Pin configuration 1
HIN
14 1
HIN VB
8 2
LIN VB
13 2
LIN HO
7 3
VSS HO
12 3
COM VS
6 4
DT
11
VS
4
LO VCC
5 5
COM
10 6
LO
9 7
VCC
8 8-Lead DSO-8 (150 mil) 14-Lead DSO-14 (150 mil) 2ED2183S06F 2ED21834S06J Figure 3
2ED2183(4)S06F(J) pin assignments (top view) 3.2
Pin functionality Table 2
Symbol Description HIN Logic input for high side gate driver output (HO), in phase with HO 𝐋𝐋𝐋𝐋𝐋𝐋 Logic inputs for low- side gate driver output (LO),out of phase with LO VSS Logic ground ( 2ED21834S06J only) DT Programmable dead-time, referenced to VSS.( 2ED21834S06J only) COM Low-side gate drive return LO Low-side driver output VCC Low-side and logic supply voltage VS High voltage floating supply return HO High-side driver output VB High-side gate drive floating supply Datasheet 5 of 24 V 2.10 www.infineon.com/soi 2019-09-12 Document Outline Features Product summary Product validation Description 1 Table of contents 2 Block diagram 3 Pin configuration and functionality 3.1 Pin configuration 3.2 Pin functionality 4 Electrical parameters 4.1 Absolute maximum ratings 4.2 Recommended operating conditions 4.3 Static electrical characteristics 4.4 Dynamic electrical characteristics 5 Application information and additional details 5.1 IGBT / MOSFET gate drive 5.2 Switching and timing relationships 5.3 Deadtime and matched propagation delays 5.4 Input logic compatibility 5.5 Undervoltage lockout 5.6 Bootstrap diode 5.7 Calculating the bootstrap capacitance CBS 5.8 Tolerant to negative tranisents on input pins 5.9 Negative voltage transient tolerance of VS pin 5.10 NTSOA – Negative Transient Safe Operating Area 5.11 Higher headroom for input to output signal transmission with logic operation upto -11 V 5.12 Maximum switching frequency 5.13 PCB layout tips 6 Qualification information0F 7 Related products 8 Package details 9 Part marking information 10 Additional documentation and resources 10.1 Infineon online forum resources 11 Revision history
Pin configuration and functionality 3.1
Pin configuration 1
HIN
14 1
HIN VB
8 2
LIN VB
13 2
LIN HO
7 3
VSS HO
12 3
COM VS
6 4
DT
11
VS
4
LO VCC
5 5
COM
10 6
LO
9 7
VCC
8 8-Lead DSO-8 (150 mil) 14-Lead DSO-14 (150 mil) 2ED2183S06F 2ED21834S06J Figure 3
2ED2183(4)S06F(J) pin assignments (top view) 3.2
Pin functionality Table 2
Symbol Description HIN Logic input for high side gate driver output (HO), in phase with HO 𝐋𝐋𝐋𝐋𝐋𝐋 Logic inputs for low- side gate driver output (LO),out of phase with LO VSS Logic ground ( 2ED21834S06J only) DT Programmable dead-time, referenced to VSS.( 2ED21834S06J only) COM Low-side gate drive return LO Low-side driver output VCC Low-side and logic supply voltage VS High voltage floating supply return HO High-side driver output VB High-side gate drive floating supply Datasheet 5 of 24 V 2.10 www.infineon.com/soi 2019-09-12 Document Outline Features Product summary Product validation Description 1 Table of contents 2 Block diagram 3 Pin configuration and functionality 3.1 Pin configuration 3.2 Pin functionality 4 Electrical parameters 4.1 Absolute maximum ratings 4.2 Recommended operating conditions 4.3 Static electrical characteristics 4.4 Dynamic electrical characteristics 5 Application information and additional details 5.1 IGBT / MOSFET gate drive 5.2 Switching and timing relationships 5.3 Deadtime and matched propagation delays 5.4 Input logic compatibility 5.5 Undervoltage lockout 5.6 Bootstrap diode 5.7 Calculating the bootstrap capacitance CBS 5.8 Tolerant to negative tranisents on input pins 5.9 Negative voltage transient tolerance of VS pin 5.10 NTSOA – Negative Transient Safe Operating Area 5.11 Higher headroom for input to output signal transmission with logic operation upto -11 V 5.12 Maximum switching frequency 5.13 PCB layout tips 6 Qualification information0F 7 Related products 8 Package details 9 Part marking information 10 Additional documentation and resources 10.1 Infineon online forum resources 11 Revision history
