Datasheet ADP5076 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 2 A/1.2 A DC-to-DC Switching Regulator with Independent Positive and Negative Outputs |
| Pages / Page | 23 / 8 — ADP5076. Data Sheet. 100. (%). C 80. IE 70. ICI. F F. FFI 60. E 60. R O … |
| Revision | A |
| File Format / Size | PDF / 725 Kb |
| Document Language | English |
ADP5076. Data Sheet. 100. (%). C 80. IE 70. ICI. F F. FFI 60. E 60. R O 50. TO 50. T A. G 40. GU E. R 30. G 30. T S. O 20. RT 20. IN = 3.3V, fSW = 1.2MHz
Model Line for this Datasheet
Text Version of Document
ADP5076 Data Sheet 100 100 90 ) 90 % (%) ( Y 80 Y C 80 C N N E IE 70 70 ICI C F F FFI 60 E 60 E R R O 50 TO 50 T A LA L U 40 G 40 GU E RE R 30 G 30 T S IN O 20 V RT 20 V O IN = 3.3V, fSW = 1.2MHz E IN = 3.3V, fSW = 1.2MHz B VIN = 3.3V, fSW = 2.4MHz V VIN = 3.3V, fSW = 2.4MHz 10 VIN = 5V, fSW = 1.2MHz IN 10 VIN = 5.0V, fSW = 1.2MHz VIN = 5V, fSW = 2.4MHz VIN = 5.0V, fSW = 2.4MHz 0 0 0.001 0.01 0.1 1
-109
0.001 0.01 0.1 1
112
CURRENT LOAD (A)
402- 20402
CURRENT LOAD (A)
20 Figure 9. Boost Regulator Efficiency vs. Current Load, VPOS = 9 V, TA = 25°C Figure 12. Inverting Regulator Efficiency vs. Current Load, VNEG = −9 V, TA = 25°C
100 100 90 ) 90 (%) (% Y Y 80 C 80 C N N E IE 70 70 ICI C F F FFI 60 E 60 E R R O 50 TO 50 T A LA L U 40 G 40 GU E RE 30 G 30 T R IN T 20 V R 20 V OOS IN = 3.3V, fSW = 1.2MHz E IN = 3.3V, fSW = 1.2MHz B VIN = 3.3V, fSW = 2.4MHz V VIN = 3.3V, fSW = 2.4MHz 10 V IN 10 IN = 5V, fSW = 1.2MHz VIN = 5V, fSW = 1.2MHz VIN = 5V, fSW = 2.4MHz VIN = 5V, fSW = 2.4MHz 0 0 0.001 0.01 0.1 1
110
0.001 0.01 0.1 1
113 2- 02-
CURRENT LOAD (A) CURRENT LOAD (A)
204 2040 Figure 10. Boost Regulator Efficiency vs. Current Load, VPOS = 15 V, TA = 25°C Figure 13. Inverting Regulator Efficiency vs. Current Load, VNEG = −15 V, TA = 25°C
100 100 90 ) ) 90 % % ( ( Y Y 80 C 80 C N N IE IE 70 70 C FIC F FFI 60 E 60 E R R O O 50 T T 50 A A L L 40 GU 40 GU E E R 30 G R 30 T IN 20 T OOS R 20 E B VIN = 3.3V, fSW = 1.2MHz V V 10 IN = 3.3V, fSW = 1.2MHz VIN = 5V, fSW = 1.2MHz IN 10 VIN = 5V, fSW = 1.2MHz VIN = 5V, fSW = 2.4MHz VIN = 5V, fSW = 2.4MHz 0 0 0.001 0.01 0.1 1
111
0.001 0.01 0.1 1
114 02-
CURRENT LOAD (A)
402- 20
CURRENT LOAD (A)
204 Figure 11. Boost Regulator Efficiency vs. Current Load, VPOS = 35 V, Figure 14. Inverting Regulator Efficiency vs. Current Load, VNEG = −30 V, TA = 25°C TA = 25°C Rev. A | Page 8 of 23 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION PULSE WIDTH MODULATION (PWM) MODE PULSE SKIP MODULATION MODE UVLO OSCILLATOR AND SYNCHRONIZATION INTERNAL REGULATOR PRECISION ENABLING SOFT START SLEW RATE CONTROL CURRENT-LIMIT PROTECTION OVERVOLTAGE PROTECTION THERMAL SHUTDOWN STARTUP SEQUENCE APPLICATIONS INFORMATION COMPONENT SELECTION Feedback Resistors OUTPUT CAPACITORS Input Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection for the Boost Regulator Inductor Selection for the Inverting Regulator LOOP COMPENSATION Boost Regulator Inverting Regulator COMMON APPLICATIONS LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
-109
0.001 0.01 0.1 1
112
CURRENT LOAD (A)
402- 20402
CURRENT LOAD (A)
20 Figure 9. Boost Regulator Efficiency vs. Current Load, VPOS = 9 V, TA = 25°C Figure 12. Inverting Regulator Efficiency vs. Current Load, VNEG = −9 V, TA = 25°C
100 100 90 ) 90 (%) (% Y Y 80 C 80 C N N E IE 70 70 ICI C F F FFI 60 E 60 E R R O 50 TO 50 T A LA L U 40 G 40 GU E RE 30 G 30 T R IN T 20 V R 20 V OOS IN = 3.3V, fSW = 1.2MHz E IN = 3.3V, fSW = 1.2MHz B VIN = 3.3V, fSW = 2.4MHz V VIN = 3.3V, fSW = 2.4MHz 10 V IN 10 IN = 5V, fSW = 1.2MHz VIN = 5V, fSW = 1.2MHz VIN = 5V, fSW = 2.4MHz VIN = 5V, fSW = 2.4MHz 0 0 0.001 0.01 0.1 1
110
0.001 0.01 0.1 1
113 2- 02-
CURRENT LOAD (A) CURRENT LOAD (A)
204 2040 Figure 10. Boost Regulator Efficiency vs. Current Load, VPOS = 15 V, TA = 25°C Figure 13. Inverting Regulator Efficiency vs. Current Load, VNEG = −15 V, TA = 25°C
100 100 90 ) ) 90 % % ( ( Y Y 80 C 80 C N N IE IE 70 70 C FIC F FFI 60 E 60 E R R O O 50 T T 50 A A L L 40 GU 40 GU E E R 30 G R 30 T IN 20 T OOS R 20 E B VIN = 3.3V, fSW = 1.2MHz V V 10 IN = 3.3V, fSW = 1.2MHz VIN = 5V, fSW = 1.2MHz IN 10 VIN = 5V, fSW = 1.2MHz VIN = 5V, fSW = 2.4MHz VIN = 5V, fSW = 2.4MHz 0 0 0.001 0.01 0.1 1
111
0.001 0.01 0.1 1
114 02-
CURRENT LOAD (A)
402- 20
CURRENT LOAD (A)
204 Figure 11. Boost Regulator Efficiency vs. Current Load, VPOS = 35 V, Figure 14. Inverting Regulator Efficiency vs. Current Load, VNEG = −30 V, TA = 25°C TA = 25°C Rev. A | Page 8 of 23 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION PULSE WIDTH MODULATION (PWM) MODE PULSE SKIP MODULATION MODE UVLO OSCILLATOR AND SYNCHRONIZATION INTERNAL REGULATOR PRECISION ENABLING SOFT START SLEW RATE CONTROL CURRENT-LIMIT PROTECTION OVERVOLTAGE PROTECTION THERMAL SHUTDOWN STARTUP SEQUENCE APPLICATIONS INFORMATION COMPONENT SELECTION Feedback Resistors OUTPUT CAPACITORS Input Capacitor VREF Capacitor Soft Start Resistor Diodes Inductor Selection for the Boost Regulator Inductor Selection for the Inverting Regulator LOOP COMPENSATION Boost Regulator Inverting Regulator COMMON APPLICATIONS LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
