Datasheet ADT7516, ADT7517, ADT7519 (Analog Devices) - 38

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ADT7516/ADT7517/ADT7519 I2C Serial Interface
2. Data is sent over the serial bus in sequences of nine clock Like all I2C-compatible devices, the ADT7516/ADT7517/ pulses: eight bits of data followed by an acknowledge bit ADT7519 have a 7-bit serial address. The four MSBs of this from the receiver of data. Transitions on the data line must address for the ADT7516/ADT7517/ADT7519 are set to 1001. occur during the low period of the clock signal and remain The three LSBs are set by Pin 11, ADD. The ADD pin can be stable during the high period, because a low to high configured three ways to give three different address options: transition when the clock is high can be interpreted as a low, floating, and high. Setting the ADD pin low gives a serial bus stop signal. address of 1001 000, leaving it floating gives the Address 1001 010, 3. When all data bytes have been read or written, stop and setting it high gives the Address 1001 011. The recommended conditions are established. In write mode, the master pulls pull-up resistor value is 10 kΩ. the data line high during the 10th clock pulse to assert a There is an enable/disable bit for the SMBus timeout. When this stop condition. In read mode, the master device pulls the is enabled, the SMBus times out after 25 ms of no activity. To data line high during the low period before the ninth clock enable it, set Bit 6 of the Control Configuration 2 register. The pulse. This is known as no acknowledge. The master then power-on default is with the SMBus timeout disabled. takes the data line low during the low period before the 10th clock pulse, and then high during the 10th clock pulse to The ADT7516/ADT7517/ADT7519 support SMBus packet assert a stop condition. error checking (PEC), but its use is optional. It is triggered by supplying the extra clocks for the PEC byte. The PEC is Any number of bytes of data can be transferred over the serial calculated using CRC-8. The frame clock sequence (FCS) bus in one operation, but it is not possible to mix read and write conforms to CRC-8 by the polynomial in one operation because the type of operation is determined at the beginning and cannot subsequently be changed without C(x) = x8 + x2 + x1 + 1 starting a new operation. Consult the SMBus specification for more information. The I2C address set up by the ADD pin is not latched by the The serial bus protocol operates as follows: device until after this address has been sent twice. On the eighth 1. The master initiates a data transfer by establishing a start SCL cycle of the second valid communication, the serial bus condition, defined as a high to low transition on the serial address is latched in. This is the SCL cycle directly after the data line (SDA) while the serial clock line (SCL) remains device has seen its own I2C serial bus address. Any subsequent high. This indicates that an address/data stream follows. changes on this pin have no effect on the I2C serial bus address. All slave peripherals connected to the serial bus respond to
Writing to the ADT7516/ADT7517/ADT7519
the start condition and shift in the next eight bits, Depending on the register being written to, there are two different consisting of a 7-bit address (MSB first) plus a R/W bit; this writes for the ADT7516/ADT7517/ADT7519. It is not possible determines the direction of the data transfer, that is, to do a block write to this part, that is, no I2C auto-increment. whether data is written to or read from the slave device.
Writing to the Address Pointer Register for a
The peripheral whose address corresponds to the
Subsequent Read
transmitted address responds by pulling the data line low To read data from a particular register, the address pointer during the low period before the ninth clock pulse, known register must contain the address of that register. If it does not, as the acknowledge bit. All other devices on the bus now the correct address must be written to the address pointer remain idle while the selected device waits for data to be register by performing a single-byte write operation, as shown read from or written to it. If the R/W bit is 0, the master in Figure 60. The write operation consists of the serial bus writes to the slave device. If the R/W bit is 1, the master address followed by the address pointer byte. No data is written reads from the slave device. to any of the data registers. A read operation is then performed to read the register.
1 9 1 9 SCL 1 0 0 1 A2 A1 A0 R/W SDA P7 P6 P5 P4 P3 P2 P1 P0 START BY ACK. BY ACK. BY STOP BY MASTER ADT7516/ADT7517/ADT7519 ADT7516/ADT7517/ADT7519 MASTER
9 -05
FRAME 1 FRAME 2
83
SERIAL BUS ADDRESS BYTE ADDRESS POINTER REGISTER BYTE
028 Figure 60. I2C—Writing to the Address Pointer Register to Select a Register for a Subsequent Read Operation Rev. B | Page 38 of 44 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DAC AC CHARACTERISTICS TIMING DIAGRAMS FUNCTIONAL BLOCK DIAGRAM ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION POWER-UP CALIBRATION CONVERSION SPEED FUNCTION DESCRIPTION—VOLTAGE OUTPUT Digital-to-Analog Converters Digital-to-Analog Section Resistor String DAC Reference Inputs Output Amplifier Thermal Voltage Output FUNCTIONAL DESCRIPTION—ANALOG INPUTS Single-Ended Inputs Converter Operation ADC TRANSFER FUNCTION Analog Input ESD Protection AIN Interrupts FUNCTIONAL DESCRIPTION—MEASUREMENT Temperature Sensor VDD Monitoring On-Chip Reference Round Robin Measurement Single Channel Measurement Temperature Measurement Method Layout Considerations Interrupts ADT7516/ADT7517/ADT7519 REGISTERS Interrupt Status 1 Register (Read-Only) [Address 0x00] Interrupt Status 2 Register (Read-Only) [Address = 0x01] Internal Temperature Value/VDD Value Register LSBs (Read-Only) [Address = 0x03] External Temperature Value and Analog Input 1 to Analog Input 4 Register LSBs (Read-Only) [Address = 0x04] VDD Value Register MSBs (Read-Only) [Address = 0x06] Internal Temperature Value Register MSBs (Read-Only) [Address = 0x07] External Temperature Value or Analog Input AIN1 Register MSBs (Read-Only) [Address = 0x08] AIN2 Register MSBs (Read) [Address = 0x09] AIN3 Register MSBs (Read) [Address = 0x0A] AIN4 Register MSBs (Read) [Address = 0x0B] DAC A Register LSBs (Read/Write) [Address = 0x10] DAC A Register MSBs (Read/Write) [Address = 0x11] DAC B Register LSBs (Read/Write) [Address = 0x12] DAC B Register MSBs (Read/Write) [Address = 0x13] DAC C Register LSBs (Read/Write) [Address = 0x14] DAC C Register MSBs (Read/Write) [Address = 0x15] DAC D Register LSBs (Read/Write) [Address = 0x16] DAC D Register MSBs (Read/Write) [Address = 0x17] Control Configuration 1 Register (Read/Write) [Address = 0x18] Control Configuration 2 Register (Read/Write) [Address = 0x19] Control Configuration 3 Register (Read/Write) [Address = 0x1A] DAC Configuration Register (Read/Write) [Address = 0x1B] LDAC Configuration Register (Write-Only)[Address = 0x1C] Interrupt Mask 1 Register (Read/Write) [Address = 0x1D] Interrupt Mask 2 Register (Read/Write) [Address = 0x1E] Internal Temperature Offset Register (Read/Write) [Address = 0x1F] External Temperature Offset Register (Read/Write) [Address = 0x20] Internal Analog Temperature Offset Register (Read/Write) [Address = 0x21] External Analog Temperature Offset Register (Read/Write) [Address = 0x22] VDD VHIGH Limit Register (Read/Write) [Address = 0x23] VDD VLOW Limit Register (Read/Write) [Address = 0x24] Internal THIGH Limit Register (Read/Write) [Address = 0x25] Internal TLOW Limit Register (Read/Write) [Address = 0x26] External THIGH/AIN1 VHIGH Limit Register (Read/Write) [Address = 0x27] External TLOW/AIN1 VLOW Limit Register (Read/Write) [Address = 0x28] AIN2 VHIGH Limit Register (Read/Write) [Address = 0x2B] AIN2 VLOW Limit Register (Read/Write) [Address = 0x2C] AIN3 VHIGH Limit Register (Read/Write) [Address = 0x2D] AIN3 VLOW Limit Register (Read/Write) [Address = 0x2E] AIN4 VHIGH Limit Register (Read/Write) [Address = 0x2F] AIN4 VLOW Limit Register (Read/Write) [Address = 0x30] Device ID Register (Read-Only) [Address = 0x4D] Manufacturer’s ID Register (Read-Only) [Address = 0x4E] Silicon Revision Register (Read-Only) [Address = 0x4F] SPI Lock Status Register (Read-Only) [Address = 0x7F] SERIAL INTERFACE Serial Interface Selection I2C Serial Interface Writing to the ADT7516/ADT7517/ADT7519 Writing to the Address Pointer Register for a Subsequent Read Writing Data to a Register Reading Data from the ADT7516/ADT7517/ADT7519 SPI Serial Interface Write Operation Read Operation SMBus/SPI INT/ SMBUS ALERT RESPONSE OUTLINE DIMENSIONS ORDERING GUIDE