Datasheet ADAS1000, ADAS1000-1, ADAS1000-2 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | Low Power, Five Electrode Electrocardiogram (ECG) Analog Front End |
| Pages / Page | 85 / 3 — Data Sheet. ADAS1000/. ADAS1000-1. /ADAS1000-2. REVISION HISTORY … |
| Revision | C |
| File Format / Size | PDF / 1.8 Mb |
| Document Language | English |
Data Sheet. ADAS1000/. ADAS1000-1. /ADAS1000-2. REVISION HISTORY 11/2018—Rev. B to Rev. C. 1/2013—Rev. 0 to Rev. A
Model Line for this Datasheet
Text Version of Document
Data Sheet ADAS1000/ ADAS1000-1 /ADAS1000-2 REVISION HISTORY 11/2018—Rev. B to Rev. C
Deleted Figure 63, Figure 64, and Figure 65; Renumbered Changes to Table 2 .. 5 Sequentially .. 35 Changes to Table 9 .. 17 Change to Figure 65, Figure 66, and Figure 67 ... 35 Changes to Figure 35 .. 22 Changes to Lead-Off Detection Section, Added Figure 68; Changes to Figure 36 Through Figure 41 .. 23 Renumbered Sequentially .. 37 Change to Figure 53 .. 26 Changes to Respiration (ADAS1000 Model Only) Section and Change to Figure 54 .. 27 Figure 69, Figure 70, and Figure 71; Added Table 13 and Changes to DC Lead-Off and High Gains Section ... 38 Table 14; Renumbered Sequentially ... 39 Added DC Lead-Off Debounce Timer Section .. 39 Changes to Pacing Artifact Detection Function (ADAS1000 Changes to AC Lead-Off Detection Section .. 39 Only) Section ... 42 Added ACLO and Common-Mode Configuration Section .. 40 Changes to Evaluating Pace Detection Performance Section ... 45 Changes to Figure 69 .. 41 Added Pace Width Section .. 45 Changes to Figure 71, Table 13, and Table 14 .. 43 Changes to Standard Serial Interface Section ... 50 Changes to Pace Amplitude Threshold Section .. 47 Changes to Data Ready (DRDY) Section ... 52 Changes to Synchronizing Devices Section and Figure 76 .. 50 Changes to Secondary Serial Interface Section and Table 25 .. 54 Changes to Sequencing Devices into Gang Mode Section .. 51 Change to Bit 3, Table 28 .. 57 Added Number of Devices in Gang Mode Section .. 51 Changes to Table 43 .. 67 Added SPI Interface Resync Section ... 56 Change to Table 45 .. 68 Changes to CRC Word Section, Clocks Section, and Changes to Table 50 .. 70 Figure 80 ... 57 Changes to Table 52 .. 71 Changes to Table 28 .. 61 Changes to Table 53 .. 72 Change to Table 32 .. 66
Changes to Table 43 .. 72
1/2013—Rev. 0 to Rev. A
Changes to Table 44 .. 73 Changes to Features Section .. 1 Changes to Table 47 .. 74 Changes to Table 1 .. 3 Changes to Table 48 .. 75 Changes to Excitation Current, Test Conditions/Comments, Changes to Table 52 .. 77 Table 2 ... 5 Changes to Example 6: Writing to Master and Slave Devices and Added Table 3; Renumbered Sequentially ... 9 Streaming Conversion Data Section, and Table 61 ... 81 Changes to Respiration (ADAS1000 Model Only) Section, Changes to Power Supply, Grounding, and Decoupling Strategy Figure 66, and Internal Respiration Capacitors Section .. 37 Section ... 83 Changes to Figure 67 .. 38 Changes to Figure 68 .. 39
6/2014—Rev. A to Rev. B
Added Evaluating Pace Detection Performance Section ... 43 Moved Revision History ... 3 Added Table 15 .. 47 Change to AC Lead-Off, Frequency Range Parameter, Table 2 .. 7 Changes to Clocks Section ... 51 Changes to Figure 17 .. 18 Changes to RESPAMP Name, Function, Table 28 .. 57 Changes to Figure 40 and Figure 41 ... 22 Changes to Bits[14:9], Function, Table 30 ... 59 Changes to ECG Channel Section .. 29 Changes to Ordering Guide ... 78 Replaced Figure 57 .. 30 Added Figure 58, Figure 59, Figure 60, Figure 61, and Figure 62;
8/2012—Revision 0: Initial Version
Renumbered Sequentially .. 31 Rev. C | Page 3 of 85 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Noise Performance Timing Characteristics Standard Serial Interface Secondary Serial Interface (Master Interface for Customer-Based Digital Pace Algorithm) ADAS1000/ADAS1000-1 Only Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Applications Information Overview ECG Inputs—Electrodes/Leads ECG Channel Electrode/Lead Formation and Input Stage Configuration Analog Lead Mode and Calculation Digital Lead Mode and Calculation Electrode Mode: Single-Ended Input Electrode Configuration Electrode Mode: Common Electrode A and Electrode B Configurations Defibrillator Protection ESIS Filtering ECG Path Input Multiplexing Common-Mode Selection and Averaging Wilson Central Terminal (WCT) Right Leg Drive/Reference Drive Calibration DAC Gain Calibration Lead-Off Detection DC Lead-Off Detection DC Lead-Off and High Gains DC Lead-Off Debounce Timer AC Lead-Off Detection ACLO and Common-Mode Configuration ADC Out of Range Shield Driver Respiration (ADAS1000 Model Only) Internal Respiration Capacitors External Respiration Path External Respiration Capacitors Respiration Carrier Frequency Evaluating Respiration Performance Extend Switch On Respiration Paths Pacing Artifact Detection Function (ADAS1000 Only) Choice of Leads Detection Algorithm Overview Pace Edge Threshold Pace Level Threshold Pace Amplitude Threshold Pace Validation Filters Pace Width Filter Biventricular Pacers Pace Detection Measurements Evaluating Pace Detection Performance Pace Width Pace Latency Pace Detection via Secondary Serial Interface (ADAS1000 and ADAS1000-1 Only) Filtering Voltage Reference Gang Mode Operation Master/Slave Synchronizing Devices Calibration Common Mode Right Leg Drive Sequencing Devices into Gang Mode Number of Devices in Gang Mode Interfacing in Gang Mode Serial Interfaces Standard Serial Interface Write Mode Write/Read Data Format Data Frames/Packets Read Mode Serial Clock Rate Data Rate and Skip Mode Data Ready (DRDYB) Detecting Missed Conversion Data SPI Interface Resync CRC Word Clocks Secondary Serial Interface RESETB PDB Function SPI Output Frame Structure (ECG and Status Data) SPI Register Definitions and Memory Map Control Registers Details Examples of Interfacing to the ADAS1000 Example 1: Initialize the ADAS1000 for ECG Capture and Start Streaming Data Example 2: Enable Respiration and Stream Conversion Data Example 3: DC Lead-Off and Stream Conversion Data Example 4: Configure 150 Hz Test Tone Sine Wave on Each ECG Channel and Stream Conversion Data Example 5: Enable Pace Detection and Stream Conversion Data Example 6: Writing to Master and Slave Devices and Streaming Conversion Data Slave Configuration Master Configuration Software Flowchart Power Supply, Grounding, and Decoupling Strategy AVDD ADCVDD and DVDD Supplies Unused Pins/Paths Layout Recommendations Outline Dimensions Ordering Guide
Deleted Figure 63, Figure 64, and Figure 65; Renumbered Changes to Table 2 .. 5 Sequentially .. 35 Changes to Table 9 .. 17 Change to Figure 65, Figure 66, and Figure 67 ... 35 Changes to Figure 35 .. 22 Changes to Lead-Off Detection Section, Added Figure 68; Changes to Figure 36 Through Figure 41 .. 23 Renumbered Sequentially .. 37 Change to Figure 53 .. 26 Changes to Respiration (ADAS1000 Model Only) Section and Change to Figure 54 .. 27 Figure 69, Figure 70, and Figure 71; Added Table 13 and Changes to DC Lead-Off and High Gains Section ... 38 Table 14; Renumbered Sequentially ... 39 Added DC Lead-Off Debounce Timer Section .. 39 Changes to Pacing Artifact Detection Function (ADAS1000 Changes to AC Lead-Off Detection Section .. 39 Only) Section ... 42 Added ACLO and Common-Mode Configuration Section .. 40 Changes to Evaluating Pace Detection Performance Section ... 45 Changes to Figure 69 .. 41 Added Pace Width Section .. 45 Changes to Figure 71, Table 13, and Table 14 .. 43 Changes to Standard Serial Interface Section ... 50 Changes to Pace Amplitude Threshold Section .. 47 Changes to Data Ready (DRDY) Section ... 52 Changes to Synchronizing Devices Section and Figure 76 .. 50 Changes to Secondary Serial Interface Section and Table 25 .. 54 Changes to Sequencing Devices into Gang Mode Section .. 51 Change to Bit 3, Table 28 .. 57 Added Number of Devices in Gang Mode Section .. 51 Changes to Table 43 .. 67 Added SPI Interface Resync Section ... 56 Change to Table 45 .. 68 Changes to CRC Word Section, Clocks Section, and Changes to Table 50 .. 70 Figure 80 ... 57 Changes to Table 52 .. 71 Changes to Table 28 .. 61 Changes to Table 53 .. 72 Change to Table 32 .. 66
Changes to Table 43 .. 72
1/2013—Rev. 0 to Rev. A
Changes to Table 44 .. 73 Changes to Features Section .. 1 Changes to Table 47 .. 74 Changes to Table 1 .. 3 Changes to Table 48 .. 75 Changes to Excitation Current, Test Conditions/Comments, Changes to Table 52 .. 77 Table 2 ... 5 Changes to Example 6: Writing to Master and Slave Devices and Added Table 3; Renumbered Sequentially ... 9 Streaming Conversion Data Section, and Table 61 ... 81 Changes to Respiration (ADAS1000 Model Only) Section, Changes to Power Supply, Grounding, and Decoupling Strategy Figure 66, and Internal Respiration Capacitors Section .. 37 Section ... 83 Changes to Figure 67 .. 38 Changes to Figure 68 .. 39
6/2014—Rev. A to Rev. B
Added Evaluating Pace Detection Performance Section ... 43 Moved Revision History ... 3 Added Table 15 .. 47 Change to AC Lead-Off, Frequency Range Parameter, Table 2 .. 7 Changes to Clocks Section ... 51 Changes to Figure 17 .. 18 Changes to RESPAMP Name, Function, Table 28 .. 57 Changes to Figure 40 and Figure 41 ... 22 Changes to Bits[14:9], Function, Table 30 ... 59 Changes to ECG Channel Section .. 29 Changes to Ordering Guide ... 78 Replaced Figure 57 .. 30 Added Figure 58, Figure 59, Figure 60, Figure 61, and Figure 62;
8/2012—Revision 0: Initial Version
Renumbered Sequentially .. 31 Rev. C | Page 3 of 85 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Noise Performance Timing Characteristics Standard Serial Interface Secondary Serial Interface (Master Interface for Customer-Based Digital Pace Algorithm) ADAS1000/ADAS1000-1 Only Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Applications Information Overview ECG Inputs—Electrodes/Leads ECG Channel Electrode/Lead Formation and Input Stage Configuration Analog Lead Mode and Calculation Digital Lead Mode and Calculation Electrode Mode: Single-Ended Input Electrode Configuration Electrode Mode: Common Electrode A and Electrode B Configurations Defibrillator Protection ESIS Filtering ECG Path Input Multiplexing Common-Mode Selection and Averaging Wilson Central Terminal (WCT) Right Leg Drive/Reference Drive Calibration DAC Gain Calibration Lead-Off Detection DC Lead-Off Detection DC Lead-Off and High Gains DC Lead-Off Debounce Timer AC Lead-Off Detection ACLO and Common-Mode Configuration ADC Out of Range Shield Driver Respiration (ADAS1000 Model Only) Internal Respiration Capacitors External Respiration Path External Respiration Capacitors Respiration Carrier Frequency Evaluating Respiration Performance Extend Switch On Respiration Paths Pacing Artifact Detection Function (ADAS1000 Only) Choice of Leads Detection Algorithm Overview Pace Edge Threshold Pace Level Threshold Pace Amplitude Threshold Pace Validation Filters Pace Width Filter Biventricular Pacers Pace Detection Measurements Evaluating Pace Detection Performance Pace Width Pace Latency Pace Detection via Secondary Serial Interface (ADAS1000 and ADAS1000-1 Only) Filtering Voltage Reference Gang Mode Operation Master/Slave Synchronizing Devices Calibration Common Mode Right Leg Drive Sequencing Devices into Gang Mode Number of Devices in Gang Mode Interfacing in Gang Mode Serial Interfaces Standard Serial Interface Write Mode Write/Read Data Format Data Frames/Packets Read Mode Serial Clock Rate Data Rate and Skip Mode Data Ready (DRDYB) Detecting Missed Conversion Data SPI Interface Resync CRC Word Clocks Secondary Serial Interface RESETB PDB Function SPI Output Frame Structure (ECG and Status Data) SPI Register Definitions and Memory Map Control Registers Details Examples of Interfacing to the ADAS1000 Example 1: Initialize the ADAS1000 for ECG Capture and Start Streaming Data Example 2: Enable Respiration and Stream Conversion Data Example 3: DC Lead-Off and Stream Conversion Data Example 4: Configure 150 Hz Test Tone Sine Wave on Each ECG Channel and Stream Conversion Data Example 5: Enable Pace Detection and Stream Conversion Data Example 6: Writing to Master and Slave Devices and Streaming Conversion Data Slave Configuration Master Configuration Software Flowchart Power Supply, Grounding, and Decoupling Strategy AVDD ADCVDD and DVDD Supplies Unused Pins/Paths Layout Recommendations Outline Dimensions Ordering Guide
