Datasheet LTM4686, LTM4686-1 (Analog Devices) - 71

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APPLICATIONS INFORMATION
• Do not put vias directly on pads, unless they are capped RUNn, GPIOn, COMPna, SYNC and SHARE_CLK pins or plated over. together—as shown in Figure 31. • Use a separate SGND copper plane for components • Bring out test points on the signal pins for monitoring. connected to signal pins. Connect SGND to GND local Figure 26 (a) shows a good example of the LTM4686's to the LTM4686. recommended layout. For flexibility, the LTM4686 is drop- • For parallel modules, tie the V + – OUTn, VOSNS0 /VOSNS and/ in pin-compatible to its taller, larger dual 13A LTM4676A or VOSNS1/SGND voltage-sense differential pair lines, and dual 18A LTM4677 sibling modules—as seen in the layout recommended by Figure 26 (b). C V IN0 IN0 VIN1 GND CIN1 V V 9 9 IN0 IN1 GND 8 8 7 7 GND GND 6 6 GND SGND GND SGND 5 5 GND GND 4 4 COUT0 COUT1 3 3 GND GND 2 2 VOUT0 VOUT1 1 1 GND A B C D E F G H J K L M A B C D E F G H J K L M GND VOUT0 VOUT1
(a) PCB Layout for LTM4686 and LTM4675, Package Top View
VIN0 GND VIN1 CIN0 CIN1 V 9 IN0 V 9 IN1 GND 8 8 7 7 GND GND 6 6 GND SGND GND 5 5 C 4 4 OUT0 COUT1 3 3 GND GND 2 2 1 1 VOUT0 VOUT1 A B C D E F G H J K L M A B C D E F G H J K L M VOUT0 CNTRL VOUT1 46861 F26ab
(b) PCB Layout to Accommodate Any of LTM4686 or LTM4675 or LTM4676A or LTM4677 Modules Figure 26. Recommended PCB Layout Package Top View
Rev. B For more information www.analog.com 71 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Configurability and Readback Data Time-Averaged and Peak Readback Data Power Module Overview EEPROM Serial Interface Device Addressing Fault Detection and Handling Responses to VOUT and IOUT Faults Responses to Timing Faults Responses to SVIN OV Faults Responses to OT/UT Faults Responses to External Faults Fault Logging Bus Timeout Protection PMBus Command Summary PMBus Commands Applications Information VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization RCONFIG Pin-Straps (External Resistor Configuration Pins) Voltage Selection Connecting the USB to the I2C/SMBus/PMBus Controller to the LTM4686 In System LTpowerPlay: An Interactive GUI for Digital Power System Management PMBus Communication and Command Processing Thermal Considerations and Output Current Derating EMI Performance Safety Considerations Layout Checklist/Example Typical Applications Appendix A Similarity Between PMBus, SMBus and I2C 2-Wire Interface Appendix B PMBus Serial Digital Interface Appendix C: PMBus Command Details Addressing and Write Protect General Configuration Registers On/Off/Margin PWM Config Voltage Current Temperature Timing Fault Response Fault Sharing Scratchpad Identification Fault Warning and Status Telemetry NVM (EEPROM) Memory Commands Package Description Package Photographs Package Description Revision History Typical Application Design Resources Related Parts