Datasheet LTM4644, LTM4644-1 (Analog Devices) - 15

link to page 24 LTM4644/LTM4644-1
APPLICATIONS INFORMATION
For example, RTR4(TOP) = 60.4k and RTR4(BOT) = 60.4k is reference only, while still keeping the power MOSFETs a good combination for coincident tracking for VOUT(MA) off. Further increasing the RUN pin voltage above 1.2V = 3.3V and VOUT(SL) = 1.2V application. will turn on the entire regulator channel.
Pre-Biased Output Start-Up
VOUT1 = 3.3V There may be situations that require the power supply to VOUT2 = 2.5V start up with some charge on the output capacitors. The TAGE VOUT3 = 1.8V LTM4644 can safely power up into a pre-biased output without discharging it. VOUT4 = 1.2V The LTM4644 accomplishes this by forcing discontinuous OUTPUT VOL mode (DCM) operation until the TRACK/SS pin voltage reaches 0.6V reference voltage. This will prevent the BG from turning on during the pre-biased output start-up TIME 4644 F06 which would discharge the output.
Figure 6. Output Coincident Tracking Waveform
Do not pre-bias LTM4644 with an output voltage higher than INTVCC (3.3V).
Power Good Overtemperature Protection
The PGOOD pins are open drain pins that can be used to monitor each valid output voltage regulation. This pin The internal overtemperature protection monitors the junc- monitors a ±10% window around the regulation point. A tion temperature of the module. If the junction temperature resistor can be pulled up to a particular supply voltage for reaches approximately 160°C, both power switches will be monitoring. To prevent unwanted PGOOD glitches dur- turned off until the temperature drops about 15°C cooler. ing transients or dynamic VOUT changes, the LTM4644’s PGOOD falling edge includes a blanking delay of approxi-
Low Input Application
mately 52 switching cycles. The LTM4644 module has a separate SVIN pin for each regulator channel which makes it compatible with opera-
Stability Compensation
tion from an input voltage as low as 2.375V. The SVIN pin The LTM4644 module internal compensation loop of each is the signal input of the regulator control circuitry while regulator channel is designed and optimized for low ESR the VIN pin is the power input which directly connected ceramic output capacitors only application. Table 6 is to the drain of the top MOSFET. In most application with provided for most application requirements. In case of input voltage ranges from 4V to 14V, connect the SVIN bulk output capacitors is required for output ripples or pin directly to the VIN pin of each regulator channel. An dynamic transient spike reduction, an additional 10pF to optional filter, consisting of a resistor (1Ω to 10Ω) be- 15pF phase boost capacitor is required between the VOUT tween SVIN and VIN ground, can be placed for additional and FB pins. The LTpowerCAD Design Tool is available to noise immunity. This filter is not necessary in most cases download for control loop optimization. if good PCB layout practices are followed (see Figure 32). In a low input voltage (2.375V to 4V) application, or to
RUN Enable
reduce power dissipation by the internal bias LDO, connect SV Pulling the RUN pin of each regulator channel to ground IN to an external voltage higher than 4V with a 0.1µF local bypass capacitor. Figure 34 shows an example of a forces the regulator into its shutdown state, turning off both low input voltage application. Please note, SV power MOSFETs and most of its internal control circuitry. IN voltage cannot go below V Bringing the RUN pin above 0.7V turns on the internal OUT voltage. Rev. G For more information www.analog.com 15 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Revision History Package Photo Design Resources Related Parts