Datasheet ACS37002 (Allegro) - 24

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400 kHz, High Accuracy Current Sensor ACS37002 with Pin-Selectable Gains and Adjustable Overcurrent Fast Fault in SOICW-16 Package FUNCTIONAL DESCRIPTION Power-On Reset Operation
Voltage 2
VCC VOUT
5 V
POWER-ON
VUVD(H) As VCC ramps up, the ACS37002 VIOUT and VREF pins are V high impedance until V POR(H) CC reaches and passes VUVD(H) [2] (or VPOR(H) [1] if UVD is disabled). Once VCC passes [2], the device A QVO 2.5 V takes some time without VCC dropping below VPOR(L) [8] before
HI Z
the device enters normal operation. tPOD tPORR tPOR-OUT
POWER-OFF
Time As VCC drops below VPOR(L) [8], the outputs will enter a high- impedance state. If UVD is enabled, before the device powers off,
Figure 5: tPOD behavior UVD disabled, RL = Pull-Up
it will force VIOUT to GND if VCC < VUVD(L) [6] until VPOR(L) [8] (seen in Figure 4 and Figure 6) is reached, at which point V
POWER-ON RESET (POR)
IOUT and V If V REF will go high Z. If UVD is disabled, then VREF and VIOUT CC falls below VPOR(L) [8] while in operation, the output will will continue to report until V re-enter a high-impedance state. After V CC is less than VPOR(L) [8] (seen in CC recovers and exceeds Figure 7), at which point they will go high Z. VUVD(H) [2], the output will begin reporting again after the delay of t Note: Since the device is entering a high Z state, and not forcing POD. the output, the time it takes the output to settle will depend on the
POWER-ON DELAY (TPOD)
external circuitry used. When the supply is ramped to VUVD(H) (seen in Figure 5 as [2]), the device will require a finite time to power its internal compo-
POWER-ON TIMING
nents before the outputs are released from high Z and can respond The descriptions in this section assume: temperature = 25°C, with to an input magnetic field. Power-On Time, tPOD, is defined as the labeled test conditions. The provided graphs in this section the time it takes for the output voltage to settle within ±10% of show VIOUT moving with VCC. The voltage of VIOUT during a its steady-state value under an applied magnetic field, which can high-impedance state will be most consistent with a known load be seen the time from [2] to [A]. After this delay, the output will (RLOAD,CLOAD). quickly approach VIOUT(Gauss) = Sens × Amps + VREF. Voltage
VCC VOUT
1 2 1 3 4 5 6 7 6 6 8 7 8 VOVD(H) VOVDHys VOVD(L) 5 V VUVD(H) VUVDHys VUVD(L) VPOR(H) VPORHys VPOR(L)
HI Z
QVO 2.5 V
HI Z HI Z HI Z
Time
Figure 4: Power States Thresholds with VIOUT Behavior for a 5 V Device, RL = Pull-Down, UVD Enabled
24 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Packages Selection guide Absolute Maximum Ratings Isolation Characteristics MA Package Specific Performance LA Package Specific Performance Pinout Diagram and Terminal List Functional Block Diagram Common Electrical Characteristics Performance Characteristics Functional Description Power-On Reset Operation Power-On Power-Off Power-On Timing Power-On Reset (POR) Overvoltage and Undervoltage Detection Undervoltage Detection Voltage Thresholds (VUVD(H/L)) Overvoltage Detection Voltage Thresholds (VOVD(H/L)) Overvoltage/Undervoltage Detection Hysteresis (VOVDHys, VUVDHys) Overvoltage and Undervoltage Enable and Disable Time (tOVD(E/D), tUVD(E/D)) Supply Zener Clamp Voltages Absolute Maximum Ratings Forward and Reverse Supply Voltage Forward and Reverse Output Voltage Forward and Reverse Reference/Fault Voltage Output Source and Sink Current Definitions of Operating and PErformance Characteristics Zero Current Voltage Output (VIOUT(Q), QVO) QVO Temperature Drift (VQE) Reference Voltage (VREF) Reference Voltage Temperature Drift (VRE) Offset Voltage (VOE) Output Saturation Voltage (VSAT(HIGH/LOW)) Sensitivity (Sens) Sensitivity Error (Esens) Gain Selection Pins Full Scale (FS) Nonlinearity (ELIN) Total Output Error (ETOT) Power Supply Offset Error (VPS) Offset Power Supply Rejection Ratio (PSRRO) Power Supply Sensitivity Error (EPS) Sensitivity Power Supply Rejection Ratio (PSRRS) Fault Behavior Overcurrent Fault (OCF) Overcurrent Fault Operating Range/Point (IOCF-OR, IOCF-OP) Overcurrent Fault Hysteresis (IOCF-Hyst) Voltage Overcurrent Pin (VOC) OverCurrent Fault Error (EOCF) OverCurrent Fault Response Time (tOCF) OverCurrent Fault Reaction Time (tOCF-R) OverCurrent Fault Mask Time (tOCF-MASK) OverCurrent Fault Hold Time (tOCF-HOLD) OverCurrent Fault Persist OCF Disable Dynamic Response Parameters Propagation Time (tpd) Rise Time (tR) Response Time (tRESPONSE) Overshoot Settling Time Temperature Compensation Temperature Compensation Update Rate Application and Theory Application Circuits Theory and Functionality – VOC and OCF VOC Driven by Non-Inverting Buffered VREF Power Supply Decoupling Capacitor and Output Capacitive Loads Dynamically Change Gain in a System Thermal Performance Thermal Rise vs. Primary Current Evaluation Board Layout Package Outline Drawings MA Package LA Package