Datasheet AD9361 (Analog Devices) - 15

Data Sheet AD9361 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 11. Parameter Rating
θJA is specified for the worst-case conditions, that is, a device VDDx to VSSx −0.3 V to +1.4 V soldered in a circuit board for surface-mount packages. VDD_INTERFACE to VSSx −0.3 V to +3.0 V
Table 12. Thermal Resistance
VDD_GPO to VSSx −0.3 V to +3.9 V
Airflow
Logic Inputs and Outputs to −0.3 V to VDD_INTERFACE + 0.3 V
Package Velocity
VSSx
Type (m/sec) θ 1, 2 1, 3 1, 4 1, 2 JA θJC θJB ΨJT Unit
Input Current to Any Pin ±10 mA 144-Ball 0 32.3 9.6 20.2 0.27 °C/W Except Supplies CSP_BGA 1.0 29.6 0.43 °C/W RF Inputs (Peak Power) 2.5 dBm 2.5 27.8 0.57 °C/W TX Monitor Input Power (Peak 9 dBm 1 Per JEDEC JESD51-7, plus JEDEC JESD51-5 2S2P test board. Power) 2 Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air). Package Power Dissipation (T 3 Per MIL-STD 883, Method 1012.1. JMAX − TA)/θJA 4 Per JEDEC JESD51-8 (still air). Maximum Junction 110°C Temperature (TJMAX)
ESD CAUTION
Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.
REFLOW PROFILE
The AD9361 reflow profile is in accordance with the JEDEC JESD20 criteria for Pb-free devices. The maximum reflow temperature is 260°C. Rev. F | Page 15 of 36 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS CURRENT CONSUMPTION—VDD_INTERFACE CURRENT CONSUMPTION—VDDD1P3_DIG AND VDDAx (COMBINATION OF ALL 1.3 V SUPPLIES) ABSOLUTE MAXIMUM RATINGS REFLOW PROFILE THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS 800 MHz FREQUENCY BAND 2.4 GHz FREQUENCY BAND 5.5 GHz FREQUENCY BAND THEORY OF OPERATION GENERAL RECEIVER TRANSMITTER CLOCK INPUT OPTIONS SYNTHESIZERS RF PLLs BB PLL DIGITAL DATA INTERFACE DATA_CLK Signal FB_CLK Signal RX_FRAME Signal ENABLE STATE MACHINE SPI Control Mode Pin Control Mode SPI INTERFACE CONTROL PINS Control Outputs (CTRL_OUT[7:0]) Control Inputs (CTRL_IN[3:0]) GPO PINS (GPO_3 TO GPO_0) AUXILIARY CONVERTERS AUXADC AUXDAC1 and AUXDAC2 POWERING THE AD9361 PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE