Datasheet ADCMP572, ADCMP573 (Analog Devices) - 11

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Data Sheet ADCMP572/ADCMP573 COMPARATOR HYSTERESIS
pin grounded. Figure 20 illustrates the amount of hysteresis The addition of hysteresis to a comparator is often desirable in a applied as a function of external resistor value. The advantages of noisy environment or when the differential input amplitudes are applying hysteresis in this manner are improved accuracy, stability, relatively small or slow moving, but excessive hysteresis has a and reduced component count. An external bypass capacitor is cost in degraded accuracy and slew-induced timing shifts. The not recommended on the HYS pin because it would likely degrade transfer function for a comparator with hysteresis is shown in the jitter performance of the device. The hysteresis pin could also Figure 19. If the input voltage approaches the threshold (0.0 V be driven by a CMOS DAC. It is biased to approximately 250 mV in this example) from the negative direction, the comparator and has an internal series resistance of 600 Ω. switches from low to high when the input crosses + V
60
H/2. The new switching threshold becomes −VH/2. The comparator remains in the high state until the threshold −V
50
H/2 is crossed from the positive direction. In this manner, noise centered on 0.0 V input does not cause the comparator to switch states
40 V) m
unless it exceeds the region bounded by ±VH/2.
ESIS ( 30 OUTPUT YSTER H 20 VOH 10 0 0 1 2 3 4 5 6 VOL RHYS (k )
04409-043 Figure 20. Hysteresis vs. RHYS Control Resistor
MINIMUM INPUT SLEW RATE REQUIREMENTS 0 INPUT –V +V H H 2 2
As with all high speed comparators, a minimum slew rate 04409-005 requirement must be met to ensure that the device does not Figure 19. Comparator Hysteresis Transfer Function oscillate as the input signal crosses the threshold. This oscillation is The customary technique for introducing hysteresis into a due in part to the high input bandwidth of the comparator and comparator uses positive feedback from the output back to the the feedback parasitics inherent in the package. A minimum input. A limitation of this approach is that the amount of slew rate of 50 V/μs should ensure clean output transitions from hysteresis varies with the output logic levels, resulting in the ADCMP572/ADCMP573 comparators. hysteresis that can be load dependent and is not symmetrical The slew rate may be too slow for other reasons. The extremely about the threshold. The external feedback network can also high bandwidth of these devices means that broadband noise introduce significant parasitics, which reduce high speed can be a significant factor when input slew rates are low. There performance and can even induce oscillation in some cases. will be at least 120 μV of thermal noise generated over the full The ADCMP572/ADCMP573 comparators offer a program- comparator bandwidth by two 50 Ω terminations at room mable hysteresis feature that can significantly improve the temperature. With a slew rate of only 50 V/μs the input will be accuracy and stability of the desired hysteresis. By connecting inside this noise band for over 2 ps, rendering the comparator’s an external pull-down resistor from the HYS pin to GND, a jitter performance of 200 fs moot. Raising the slew rate of the variable amount of hysteresis can be applied. Leaving the HYS input signal and/or reducing the bandwidth over which this pin disconnected disables the feature, and hysteresis is then less resistance is seen at the input can greatly reduce jitter. than 1 mV as specified. The maximum hysteresis that can be applied using this method is approximately ±25 mV with the Rev. B | Page 11 of 14 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING CML/RSPECL OUTPUT STAGE USING/DISABLING THE LATCH FEATURE OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATIONDELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENTS TYPICAL APPLICATION CIRCUITS TIMING INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE