Datasheet ADP7182 (Analog Devices) - 5

ManufacturerAnalog Devices
Description–28 V, −200 mA, Low Noise, Linear Regulator
Pages / Page32 / 5 — Data Sheet. ADP7182. Parameter. Symbol. Test Conditions/Comments. Min. …
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Document LanguageEnglish

Data Sheet. ADP7182. Parameter. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit

Data Sheet ADP7182 Parameter Symbol Test Conditions/Comments Min Typ Max Unit

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Data Sheet ADP7182 Parameter Symbol Test Conditions/Comments Min Typ Max Unit
POWER SUPPLY REJECTION RATIO PSRR 1 MHz, VIN = −4.3 V, VOUT = −3 V 45 dB 1 MHz, VIN = −6 V, VOUT = −5 V 32 dB 100 kHz, VIN = −4.3 V, VOUT = −3 V 45 dB 100 kHz, VIN = −6 V, VOUT = −5 V 45 dB 10 kHz, VIN = −4.3 V, VOUT = −3 V 66 dB 10 kHz, VIN = −6 V, VOUT = −5 V 66 dB 1 MHz, VIN = −16 V, VOUT = −15 V, adjustable mode, 45 dB CNR = 100 nF, RNR = 13 kΩ, RFB1 = 13 kΩ, RFB2 = 147 kΩ 100 kHz, VIN = −16 V, VOUT = −15 V, adjustable mode, 45 dB CNR = 100 nF, RNR = 13 kΩ, RFB1 = 13 kΩ, RFB2 = 147 kΩ 10 kHz, VIN = −16 V, VOUT = −15 V, adjustable mode, 66 dB CNR = 100 nF, RNR = 13 kΩ, RFB1 = 13 kΩ, RFB2 = 147 kΩ 1 Based on an endpoint calculation using −1 mA and −200 mA loads. See Figure 10 for the typical load regulation performance for loads less than 1 mA. 2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages below −3 V. 3 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of the nominal value. 4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a −5 V output voltage is defined as the current that causes the output voltage to drop to 90% of −5 V, or −4.5 V.
INPUT AND OUTPUT CAPACITANCE, RECOMMENDED SPECIFICATIONS Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT AND OUTPUT CAPACITANCE Minimum Capacitance1 CMIN TA = −40°C to +125°C 1.5 2.2 μF Capacitor Effective Series Resistance (ESR) RESR TA = −40°C to +125°C 0.001 0.2 Ω 1 The minimum input and output capacitance must be greater than 1.5 μF over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with any LDO. Rev. M | Page 5 of 32 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITANCE, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ADJUSTABLE MODE OPERATION APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties ENABLE PIN OPERATION SOFT START NOISE REDUCTION OF THE ADJUSTABLE ADP7182 CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS Thermal Characterization Parameter, ΨJB PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
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