Datasheet ADM7151 (Analog Devices) - 4

ManufacturerAnalog Devices
Description800 mA Ultralow Noise, High PSRR, RF Linear Regulator
Pages / Page24 / 4 — ADM7151. Data Sheet. Parameter. Symbol. Test Conditions/Comments. Min. …
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ADM7151. Data Sheet. Parameter. Symbol. Test Conditions/Comments. Min. Typ Max. Unit

ADM7151 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit

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ADM7151 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit
V 5 REG UNDERVOLTAGE THRESHOLDS VREG Rise VREGUVLORISE TJ = −40°C to +125°C 3.1 V VREG Fall VREGUVLOFALL TJ = −40°C to +125°C 2.55 V Hysteresis VREGUVLOHYS 210 mV EN INPUT 4.5 V ≤ VIN ≤ 16 V EN Input Logic High ENHIGH 3.2 V EN Input Logic Low ENLOW 0.8 V EN Input Logic Hysteresis ENHYS VIN = 5 V 225 mV EN Input Leakage Current IEN-LKG VEN = VIN or GND 0.1 1.0 µA 1 Based on an end-point calculation using 1 mA and 800 mA loads. See Figure 6 and Figure 13 for typical load regulation performance for loads less than 1 mA. 2 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 5.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 5.0 V, or 4.5 V. 3 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to achieve the nominal output voltage. Dropout applies only for output voltages above 4.5 V. 4 Start-up time is defined as the time between the rising edge of VEN to VOUT, VREG, or VREF being at 90% of its nominal value. 5 The output voltage is turned off until the VREG UVLO rise threshold is crossed. The VREG output is turned off until the input voltage UVLO rising threshold is crossed.
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
CAPACITANCE TA = −40°C to +125°C Minimum Input1 CIN 7.0 µF Minimum Regulator1 CREG 7.0 µF Minimum Output1 COUT 7.0 µF Minimum Bypass CBYP 0.1 µF Minimum Reference CREF 0.7 µF CAPACITOR EQUIVALENT SERIES RESISTANCE (ESR) RESR TA = −40°C to +125°C CREG, COUT, CIN, CREF 0.001 0.2 Ω CBYP 0.001 2.0 Ω 1 The minimum input, regulator, and output capacitance must be greater than 7.0 µF over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; however, Y5V and Z5U capacitors are not recommended for use with any LDO. Rev. B | Page 4 of 24 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION MODEL SELECTION CAPACITOR SELECTION Output Capacitor Input and VREG Capacitor REF Capacitor BYP Capacitor Capacitor Properties ENABLE (EN) AND UNDERVOLTAGE LOCKOUT (UVLO) START-UP TIME REF, BYP, AND VREG PINS CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS Thermal Characterization Parameter (ΨJB) PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
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