Datasheet HMC1060LP3E (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | Quad Low Noise High PSRR Linear Voltage Regulator |
| Pages / Page | 16 / 3 — HMC1060LP3E. QUAD LOW NOISE HIGH PSRR. LINEAR VOLTAGE REGULATOR. Typical … |
| File Format / Size | PDF / 1.3 Mb |
| Document Language | English |
HMC1060LP3E. QUAD LOW NOISE HIGH PSRR. LINEAR VOLTAGE REGULATOR. Typical Performance Characteristics
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HMC1060LP3E
v00.1211
QUAD LOW NOISE HIGH PSRR LINEAR VOLTAGE REGULATOR Typical Performance Characteristics
t = +25 °C, Vdd = 5.6 V, Unless otherwise Specified, PtAt Mode is disabled, measured at maximum load conditions A t in default configuration as shown in Application Schematic. M
Figure 1. Typical Output Noise Density at Figure 2. Typical Output Noise Density vs. Each HMC1060LP3E Output Capacitor Values
[1] 10-6 10-6 g - S VR1 100 mA 10 uF @ VRx & 4.7 uF @ VREF VR2 50 mA 10 uF @ VRx & 1 uF @ VREF z) z) 4.7 uF for All 10-7 in 10-7 VR3 50 mA √Η 1 uF for All √Η VR4 300 mA (V/ n (V/ Y Y T T SI SI 10-8 10-8 io EN EN D D it ISE ISE O O 10-9 d 10-9 N N n o 10-10 10-10 102 103 104 105 106 107 102 103 104 105 106 107 FREQUENCY (Hz) FREQUENCY (Hz) r C
Figure 3. VR1, VR2, VR3, & VR4 Power Figure 4. VR4 PSRR vs. VDD (4.7
µ
F on
e
Supply Rejection Ratio (PSRR) VR4 and VREF)
w -40 -20 o -50 -30 P -60 -40 B) -70 B) -50 (d (d R R -80 -60 PSR PSR -90 -70 VDD 5.6V VR4 300 mA Load Current VDD 5.4V -100 VR1 100 mA Load Current -80 VDD 5.2V VR2 & VR3 50 mA Load Current -110 -90 102 103 104 105 106 107 102 103 104 105 106 107 FREQUENCY (Hz) FREQUENCY (Hz)
Figure 5. VR1, 2, 3 Voltage vs. Figure 6. VR1, 2, 3 Voltage vs. Temperature, PTAT Mode Disabled Temperature, PTAT Mode Enabled
3.45 3.45 3.4 3.4 VR1 100 mA Load Current VR2 50 mA Load Current (V) VR3 50 mA Load Current (V) E E 3.35 3.35 AG AG T L T L VO VO T 3.3 T 3.3 PU PU T T U U O O 3.25 3.25 VR1 100 mA Load Current VR2 50 mA Load Current VR3 50 mA Load Current 3.2 3.2 -40 -20 0 20 40 60 80 -40 -20 0 20 40 60 80 TEMPERATURE (OC) TEMPERATURE (OC) [1] VreF capacitor corresponds to C1 in Application Schematic. Vrx capacitors correspond to capacitors C10, C7, C8, C9 at the output of Vr1, Vr2, Vr3 and Vr4 pins of the HMC1060LP3e respectively. Inf F or o m r p atio r n ifc ur e n , d ishe e d lbiv y e A r n y a alog n D d t evic o p es is la beclie o eved rd to ebre sa: H ccur iattti e tae M nd re ilicarbloew . H a o ve C wever, o n rp o For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other oration, 2 Elizabeth Drive, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 978-250-3343 Fax: 978-250-3373 O rights of third parties that may result from its use. Specifications subject to change without notice. No P rd ho e ne r O : 7 n 81- -3li 2n 9 e a -47 t w 0 w 0 • O w rd .h e it r o tniltie n .c e ao t m
3
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. www.analog.com Application Support: Pho Trademarks and registered trademarks are the property of their respective owners. ne: 978-250-33 A 4 p 3 o plica r a tio p n S p u s p @ po h rt itt : P ite ho . n c e o : 1m -800-ANALOG-D
v00.1211
QUAD LOW NOISE HIGH PSRR LINEAR VOLTAGE REGULATOR Typical Performance Characteristics
t = +25 °C, Vdd = 5.6 V, Unless otherwise Specified, PtAt Mode is disabled, measured at maximum load conditions A t in default configuration as shown in Application Schematic. M
Figure 1. Typical Output Noise Density at Figure 2. Typical Output Noise Density vs. Each HMC1060LP3E Output Capacitor Values
[1] 10-6 10-6 g - S VR1 100 mA 10 uF @ VRx & 4.7 uF @ VREF VR2 50 mA 10 uF @ VRx & 1 uF @ VREF z) z) 4.7 uF for All 10-7 in 10-7 VR3 50 mA √Η 1 uF for All √Η VR4 300 mA (V/ n (V/ Y Y T T SI SI 10-8 10-8 io EN EN D D it ISE ISE O O 10-9 d 10-9 N N n o 10-10 10-10 102 103 104 105 106 107 102 103 104 105 106 107 FREQUENCY (Hz) FREQUENCY (Hz) r C
Figure 3. VR1, VR2, VR3, & VR4 Power Figure 4. VR4 PSRR vs. VDD (4.7
µ
F on
e
Supply Rejection Ratio (PSRR) VR4 and VREF)
w -40 -20 o -50 -30 P -60 -40 B) -70 B) -50 (d (d R R -80 -60 PSR PSR -90 -70 VDD 5.6V VR4 300 mA Load Current VDD 5.4V -100 VR1 100 mA Load Current -80 VDD 5.2V VR2 & VR3 50 mA Load Current -110 -90 102 103 104 105 106 107 102 103 104 105 106 107 FREQUENCY (Hz) FREQUENCY (Hz)
Figure 5. VR1, 2, 3 Voltage vs. Figure 6. VR1, 2, 3 Voltage vs. Temperature, PTAT Mode Disabled Temperature, PTAT Mode Enabled
3.45 3.45 3.4 3.4 VR1 100 mA Load Current VR2 50 mA Load Current (V) VR3 50 mA Load Current (V) E E 3.35 3.35 AG AG T L T L VO VO T 3.3 T 3.3 PU PU T T U U O O 3.25 3.25 VR1 100 mA Load Current VR2 50 mA Load Current VR3 50 mA Load Current 3.2 3.2 -40 -20 0 20 40 60 80 -40 -20 0 20 40 60 80 TEMPERATURE (OC) TEMPERATURE (OC) [1] VreF capacitor corresponds to C1 in Application Schematic. Vrx capacitors correspond to capacitors C10, C7, C8, C9 at the output of Vr1, Vr2, Vr3 and Vr4 pins of the HMC1060LP3e respectively. Inf F or o m r p atio r n ifc ur e n , d ishe e d lbiv y e A r n y a alog n D d t evic o p es is la beclie o eved rd to ebre sa: H ccur iattti e tae M nd re ilicarbloew . H a o ve C wever, o n rp o For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other oration, 2 Elizabeth Drive, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 978-250-3343 Fax: 978-250-3373 O rights of third parties that may result from its use. Specifications subject to change without notice. No P rd ho e ne r O : 7 n 81- -3li 2n 9 e a -47 t w 0 w 0 • O w rd .h e it r o tniltie n .c e ao t m
3
license is granted by implication or otherwise under any patent or patent rights of Analog Devices. www.analog.com Application Support: Pho Trademarks and registered trademarks are the property of their respective owners. ne: 978-250-33 A 4 p 3 o plica r a tio p n S p u s p @ po h rt itt : P ite ho . n c e o : 1m -800-ANALOG-D
