Datasheet ADP160, ADP161, ADP162, ADP163 (Analog Devices) - 3

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Data Sheet ADP160/ADP161/ADP162/ADP163 SPECIFICATIONS
VIN = (VOUT + 0.5 V) or 2.2 V, whichever is greater; EN = VIN, IOUT = 10 mA, CIN = COUT = 1 μF, TA = 25°C, unless otherwise noted.
Table 1. Parameter Symbol Conditions Min Typ Max Unit
INPUT VOLTAGE RANGE VIN TJ = −40°C to +125°C 2.2 5.5 V OPERATING SUPPLY CURRENT IGND IOUT = 0 μA 560 1250 nA IOUT = 0 μA, TJ = −40°C to +125°C 2.3 μA IOUT = 1 μA 860 1800 nA IOUT = 1 μA, TJ = −40°C to +125°C 2.8 μA IOUT = 100 μA 2.6 4.5 μA IOUT = 100 μA, TJ = −40°C to +125°C 5.8 μA IOUT = 10 mA 11 μA IOUT = 10 mA, TJ = −40°C to +125°C 19 μA IOUT = 150 mA 42 μA IOUT = 150 mA, TJ = −40°C to +125°C 65 μA SHUTDOWN CURRENT IGND-SD EN = GND 50 nA EN = GND, TJ = −40°C to +125°C 1 μA OUTPUT VOLTAGE ACCURACY VOUT IOUT = 10 mA −1 +1 % 0 μA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V −2 +2 % 0 μA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V, −3.5 +3.5 % TJ = −40°C to +125°C ADJUSTABLE-OUTPUT VOLTAGE VADJ IOUT = 10 mA 0.99 1.0 1.01 V ACCURACY (ADP161/ADP163)1 0 μA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V 0.98 1.02 V 0 μA < IOUT < 150 mA, VIN = (VOUT + 0.5 V) to 5.5 V, 0.97 1.03 V TJ = −40°C to +125°C REGULATION Line Regulation ∆VOUT/∆VIN VIN = (VOUT + 0.5 V) to 5.5 V, TJ = −40°C to +125°C −0.1 +0.1 %/V Load Regulation2 ∆VOUT/∆IOUT IOUT = 100 μA to 150 mA 0.004 %/mA IOUT = 100 μA to 150 mA, TJ = −40°C to +125°C 0.01 %/mA DROPOUT VOLTAGE3 VOUT = 3.3 V 4-Ball WLCSP VDROPOUT IOUT = 10 mA 7 mV IOUT = 10 mA, TJ = −40°C to +125°C 13 mV IOUT = 150 mA 105 mV IOUT = 150 mA, TJ = −40°C to +125°C 195 mV 5-Lead TSOT IOUT = 10 mA 8 mV IOUT = 10 mA, TJ = −40°C to +125°C 15 mV IOUT = 150 mA 120 mV IOUT = 150 mA, TJ = −40°C to +125°C 225 mV ADJ INPUT BIAS CURRENT (ADP161/ADP163) ADJI-BIAS 2.2 V ≤ VIN ≤ 5.5 V, ADJ connected to VOUT 10 nA ACTIVE PULL-DOWN RESISTANCE TSHUTDOWN VOUT = 2.8 V, RLOAD = ∞ 300 600 Ω (ADP160/ADP161) START-UP TIME4 TSTART-UP VOUT = 3.3 V 1100 μs CURRENT LIMIT THRESHOLD5 ILIMIT 220 320 500 mA THERMAL SHUTDOWN Thermal Shutdown Threshold TSSD TJ rising 150 °C Thermal Shutdown Hysteresis TSSD-HYS 15 °C EN INPUT En Input Logic High VIH 2.2 V ≤ VIN ≤ 5.5 V 1.2 V EN Input Logic Low VIL 2.2 V ≤ VIN ≤ 5.5 V 0.4 V EN Input Leakage Current VI-LEAKAGE EN = VIN or GND 0.1 μA EN = VIN or GND, TJ = −40°C to +125°C 1 μA Rev. H | Page 3 of 24 Document Outline Features Applications Typical Application Circuits General Description Table of Contents Revision History Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Applications Information Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Enable Feature Current Limit and Thermal Overload Protection Thermal Considerations PCB Layout Considerations Light Sensitivity of WLCSPs Outline Dimensions Ordering Guide