Datasheet ADP1712, ADP1713, ADP1714 (Analog Devices) - 10

ManufacturerAnalog Devices
Description300 mA, Low Dropout CMOS Linear Regulator
Pages / Page16 / 10 — ADP1712/ADP1713/ADP1714. THEORY OF OPERATION. SOFT-START FUNCTION …
RevisionA
File Format / SizePDF / 496 Kb
Document LanguageEnglish

ADP1712/ADP1713/ADP1714. THEORY OF OPERATION. SOFT-START FUNCTION (ADP1712). OUT. CURRENT. LIMIT. THERMAL. PROTECT. SHUTDOWN. AND UVLO. SS/

ADP1712/ADP1713/ADP1714 THEORY OF OPERATION SOFT-START FUNCTION (ADP1712) OUT CURRENT LIMIT THERMAL PROTECT SHUTDOWN AND UVLO SS/

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ADP1712/ADP1713/ADP1714 THEORY OF OPERATION
The ADP1712/ADP1713/ADP1714 are low dropout linear regula-
SOFT-START FUNCTION (ADP1712)
tors that use an advanced, proprietary architecture to provide high For applications that require a controlled startup, the ADP1712 power supply rejection ratio (PSRR) and excellent line and load provides a programmable soft-start function. Programmable soft transient response with just a small 2.2 μF ceramic output capac- start is useful for reducing inrush current upon startup and for pro- itor. All devices operate from a 2.5 V to 5.5 V input rail and provide viding voltage sequencing. To implement soft start, connect a small up to 300 mA of output current. Incorporating a novel scaling ceramic capacitor from SS to GND. Upon startup, a 1.2 μA current architecture, ground current is very low when driving light loads. source charges this capacitor. The ADP1712 start-up output voltage Ground current in the shutdown mode is typically less than 1 μA. is limited by the voltage at SS, providing a smooth ramp up to the nominal output voltage. The soft-start time is calculated by TSS = VREF × (CSS/ISS) (1)
IN OUT
where: TSS is the soft-start period.
CURRENT
VREF is the 0.8 V reference voltage.
LIMIT THERMAL
CSS is the soft-start capacitance from SS to GND.
PROTECT
ISS is the current sourced from SS (1.2 μA).
SHUTDOWN
When the ADP1712 is disabled (using EN), the soft-start capacitor
AND UVLO SS/ ADJ/
is discharged to GND through an internal 100 Ω resistor.
BYP/ EN TRK REFERENCE
3 02
GND
5- 45 06
EN
Figure 25. Internal Block Diagram Internally, the ADP1712/ADP1713/ADP1714 each consist of a
IV
reference, an error amplifier, a feedback voltage divider, and a
/D 1 2V
PMOS pass transistor. Output current is delivered via the PMOS pass device, which is controlled by the error amplifier. The error amplifier compares the reference voltage with the feedback volt-
OUT VIN = 5V V
age from the output and amplifies the difference. If the feedback
IV OUT = 3.3V C /D 2 OUT = 2.2μF
voltage is lower than the reference voltage, the gate of the PMOS
C 2V SS = 22nF ILOAD = 300mA
40 device is pulled lower, which allows more current to pass and -0
TIME (4ms/DIV)
55 increases the output voltage. If the feedback voltage is higher than 64 0

Figure 26. OUT Ramp-Up with External Soft-Start Capacitor the reference voltage, the gate of the PMOS device is pulled higher, allowing less current to pass and decreasing the output voltage. The ADP1712 adjustable version, ADP1713, and ADP1714 have no pins for soft start, so the function is switched to an internal The ADP1712 is available in two versions, one with a fixed output soft-start capacitor. This sets the soft-start ramp-up period to voltage and one with an adjustable output voltage. The fixed output approximately 24 μs. voltage is set internally to one of sixteen values between 0.75 V and 3.3 V, using an internal feedback network. The adjustable output voltage can be set to between 0.8 V and 5.0 V by an external voltage divider connected from OUT to ADJ. The ADP1713 and ADP1714
EN
are available in fixed output voltage options only. The ADP1712 fixed version allows an external soft-start capacitor to be connected between the SS pin and GND, which controls the output voltage
IV /D 1
ramp during startup. The ADP1713 allows a reference bypass
2V
capacitor to be connected between the BYP pin and GND, which reduces output voltage noise and improves power supply rejection. The ADP1714 features a track pin, which allows the output voltage
VIN = 5V IV OUT VOUT = 1.6V
to follow the voltage at the TRK pin.
/D 2 C 1V OUT = 2.2μF ILOAD = 10mA
41 A logic on the EN pin determines if the output is active. When EN -0
TIME (20µs/DIV)
55 64

is high, the output is on, and when EN is low, the output is off. 0 Figure 27. OUT Ramp-Up with Internal Soft-Start Rev. A | Page 10 of 16 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SOFT-START FUNCTION (ADP1712) ADJUSTABLE OUTPUT VOLTAGE(ADP1712 ADJUSTABLE) BYPASS CAPACITOR (ADP1713) TRACK MODE (ADP1714) ENABLE FEATURE UNDERVOLTAGE LOCKOUT (UVLO) APPLICATION INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
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