link to page 16 link to page 16 link to page 16 link to page 16 AD734 is sufficient gain to raise the amplitude of E +15V IN to that required to AD7340.1µF establish an output amplitude of EC over the range of 1 V to 10 V. VIN1 X1VP 14 The X input of the AD734, which has finite offset voltage, can be 1/2LU2bAD7082 X2DD 13R1 troublesome at the output at high gains. The output offset is L3.32kΩ3 U0W 12 reduced to that of the X input (1 mV or 2 mV) by the offset 1/2U2aC1C24 U1Z1 11AD708 loop comprising R3, C3, and Buffer A1. The low-pass corner 47µF1µF frequency of 0.16 Hz is transformed to a high-pass corner that is 5 U2Z2 10LLL multiplied by the gain (for example, 160 Hz at a gain of 1000). 6 Y1ER 920.1µFVO = VIN7 Y2VN 8 In applications not requiring operation down to low frequencies, LL 7 Amplifier A1 can be eliminated, but the AD734’s input resistance 01 –15V 7- 82 of 50 kΩ between X1 and X2 reduces the time constant and 00 Figure 34. A Two-Chip, Wideband RMS-to-DC Converter increases the input offset. Using a nonpolar 20 mF tantalum capacitor for C1 results in the same unity-gain high-pass corner; in In this application, the AD734 and an AD708 dual op amp this case, the offset gain increases to 20, which is still acceptable. serve as a two-chip rms-to-dc converter with a 10 MHz bandwidth. Figure 35 shows the circuit’s performance for Figure 33 shows the error in the output for sinusoidal inputs at square-, sine-, and triangle-wave inputs. The circuit accepts 100 Hz, 100 kHz, and 1 MHz, with EC set to 10 V. The output signals as high as 10 V p-p with a crest factor of 1 or 1 V p-p error for any frequency between 300 Hz and 300 kHz is similar with a crest factor of 10. The circuit’s response is flat to 10 MHz to that for 100 kHz. At low signal frequencies and low input with an input of 10 V, flat to almost 5 MHz for an input of 1 V, amplitudes, the dynamics of the control loop determine the gain and to almost 1 MHz for inputs of 100 mV. For accurate error and distortion; at high frequencies, the 200 MHz gain- measurements of input levels below 100 mV, the AD734’s bandwidth product of the AD734 limits the available gain. output offset (Z interface) voltage, which contributes a dc error, The output amplitude tracks EC over the range of 1 V to slightly must be trimmed out. more than 10 V. In the circuit shown in Figure 34, the AD734 squares the input 2 signal, and its output (V 2 IN ) is averaged by a low-pass filter that consists of R1 and C1 and has a corner frequency of 1 Hz. Because of the implicit feedback loop, this value is both the output value, 1100kHz VRMS, and the denominator in Equation 13. U2a and U2b, an AD708 dual dc precision op amp, serve as unity-gain buffers, B) d supplying both the output voltage and driving the U interface. R (0100RRO E10–1100Hz1MHz) (V1 016 E 7- –2 082 0 LTAG0.010.1110O 100mINPUT AMPLITUDE (V)VUT Figure 33. AGC Amplifier Output Error vs. Input Voltage P UT10mOWIDEBAND RMS-TO-DC CONVERTER USING U INTERFACE1mSQUARE WAVESINE WAVE 018 TRI-WAVE The AD734 is well-suited to such applications as implicit rms- 27- 100µ 08 0 to-dc conversion, where the AD734 implements the function 10k100k1M10M [ INPUT FREQUENCY (Hz) V 2 avg IN ] Figure 35. RMS-to-DC Converter Performance V = (13) RMS VRMS using its direct divide mode. Figure 34 shows the circuit. Rev. E | Page 16 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS FUNCTIONAL DESCRIPTION AVAILABLE TRANSFER FUNCTIONS DIRECT DENOMINATOR CONTROL OPERATION AS A MULTIPLIER Standard Multiplier Connections Current Output Squaring and Frequency-Doubling OPERATION AS A DIVIDER Feedback Divider Connections Connections for Square-Rooting DIVISION BY DIRECT DENOMINATOR CONTROL A PRECISION AGC LOOP WIDEBAND RMS-TO-DC CONVERTER USING U INTERFACE LOW DISTORTION MIXER OUTLINE DIMENSIONS ORDERING GUIDE