Datasheet AD743 (Analog Devices) - 4
| Manufacturer | Analog Devices |
| Description | Ultralow Noise BiFET Op Amp |
| Pages / Page | 12 / 4 — AD743–Typical Performance Characteristics. (@ 25. C, VS = 15 V). RLOAD = … |
| Revision | E |
| File Format / Size | PDF / 297 Kb |
| Document Language | English |
AD743–Typical Performance Characteristics. (@ 25. C, VS = 15 V). RLOAD = 10k. POSITIVE. SUPPLY. +VIN. NEGATIVE. INPUT VOLTAGE SWING (V)
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Text Version of Document
AD743–Typical Performance Characteristics (@ 25
ⴗ
C, VS = 15 V) 20 20 35 RLOAD = 10k
⍀
RLOAD = 10k
⍀
30 POSITIVE 15 15 SUPPLY 25 +VIN 20 10 10 15 –V NEGATIVE IN SUPPLY 10 5 50 INPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V p-p) 5 0 0 0 0 5 10 15 20 0 5 10 15 20 10 100 1k 10k SUPPLY VOLTAGE (
ⴞ
V) SUPPLY VOLTAGE (
ⴞ
V) LOAD RESISTANCE (
⍀
)
TPC 1. Input Voltage Swing vs. TPC 2. Output Voltage Swing TPC 3. Output Voltage Swing Supply Voltage vs. Supply Voltage vs. Load Resistance
12 10–6 200 100 10–7 ) 9
⍀
10 10–8 6 10–9 1 10–10 3 OUTPUT IMPEDANCE ( 0.1 QUIESCENT CURRENT (mA) INPUT BIAS CURRENT (A) 10–11 0 10–12 0.01 0 5 10 15 20 –60 –40 –20 0 20 40 60 80 100 120 140 10k 100k 1M 10M 100M SUPPLY VOLTAGE (
ⴞ
V) TEMPERATURE (
ⴗ
C) FREQUENCY (Hz)
TPC 4. Quiescent Current vs. TPC 5. Input Bias Current vs. TPC 6. Output Impedance vs. Supply Voltage Temperature Frequency (Closed-Loop Gain = –1)
300 80 7.0 70 6.0 60 + OUTPUT 200 CURRENT 50 5.0 40 4.0 30 100 – OUTPUT CURRENT CURRENT LIMIT (mA) 20 INPUT BIAS CURRENT (pA) 3.0 10 GAIN BANDWIDTH PRODUCT (MHz) 0 0 2.0 –12 –9 –6 –3 0 3 6 9 12 –60 –40 –20 0 20 40 60 80 100 120 140 –60 –40 –20 0 20 40 60 80 100 120 140 COMMON-MODE VOLTAGE (V) TEMPERATURE (
ⴗ
C) TEMPERATURE (
ⴗ
C)
TPC 7. Input Bias Current vs. TPC 8. Short Circuit Current TPC 9. Gain Bandwidth Product Common-Mode Voltage Limit vs. Temperature vs. Temperature –4– REV. E Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS CONNECTION DIAGRAMS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD SUSCEPTIBILITY ORDERING GUIDE Typical Performance Characteristics OP AMP PERFORMANCE: JFET VS. BIPOLAR DESIGNING CIRCUITS FOR LOW NOISE LOW NOISE CHARGE AMPLIFIERS HOW CHIP PACKAGE TYPE AND POWER DISSIPATION AFFECT INPUT BIAS CURRENT REDUCED POWER SUPPLY OPERATION FOR LOWER IB AN INPUT IMPEDANCE COMPENSATED, SALLEN-KEY FILTER TWO HIGH PERFORMANCE ACCELEROMETER AMPLIFIERS LOW NOISE HYDROPHONE AMPLIFIER BALANCING SOURCE IMPEDANCES OUTLINE DIMENSIONS Revision History
ⴗ
C, VS = 15 V) 20 20 35 RLOAD = 10k
⍀
RLOAD = 10k
⍀
30 POSITIVE 15 15 SUPPLY 25 +VIN 20 10 10 15 –V NEGATIVE IN SUPPLY 10 5 50 INPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V p-p) 5 0 0 0 0 5 10 15 20 0 5 10 15 20 10 100 1k 10k SUPPLY VOLTAGE (
ⴞ
V) SUPPLY VOLTAGE (
ⴞ
V) LOAD RESISTANCE (
⍀
)
TPC 1. Input Voltage Swing vs. TPC 2. Output Voltage Swing TPC 3. Output Voltage Swing Supply Voltage vs. Supply Voltage vs. Load Resistance
12 10–6 200 100 10–7 ) 9
⍀
10 10–8 6 10–9 1 10–10 3 OUTPUT IMPEDANCE ( 0.1 QUIESCENT CURRENT (mA) INPUT BIAS CURRENT (A) 10–11 0 10–12 0.01 0 5 10 15 20 –60 –40 –20 0 20 40 60 80 100 120 140 10k 100k 1M 10M 100M SUPPLY VOLTAGE (
ⴞ
V) TEMPERATURE (
ⴗ
C) FREQUENCY (Hz)
TPC 4. Quiescent Current vs. TPC 5. Input Bias Current vs. TPC 6. Output Impedance vs. Supply Voltage Temperature Frequency (Closed-Loop Gain = –1)
300 80 7.0 70 6.0 60 + OUTPUT 200 CURRENT 50 5.0 40 4.0 30 100 – OUTPUT CURRENT CURRENT LIMIT (mA) 20 INPUT BIAS CURRENT (pA) 3.0 10 GAIN BANDWIDTH PRODUCT (MHz) 0 0 2.0 –12 –9 –6 –3 0 3 6 9 12 –60 –40 –20 0 20 40 60 80 100 120 140 –60 –40 –20 0 20 40 60 80 100 120 140 COMMON-MODE VOLTAGE (V) TEMPERATURE (
ⴗ
C) TEMPERATURE (
ⴗ
C)
TPC 7. Input Bias Current vs. TPC 8. Short Circuit Current TPC 9. Gain Bandwidth Product Common-Mode Voltage Limit vs. Temperature vs. Temperature –4– REV. E Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS CONNECTION DIAGRAMS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD SUSCEPTIBILITY ORDERING GUIDE Typical Performance Characteristics OP AMP PERFORMANCE: JFET VS. BIPOLAR DESIGNING CIRCUITS FOR LOW NOISE LOW NOISE CHARGE AMPLIFIERS HOW CHIP PACKAGE TYPE AND POWER DISSIPATION AFFECT INPUT BIAS CURRENT REDUCED POWER SUPPLY OPERATION FOR LOWER IB AN INPUT IMPEDANCE COMPENSATED, SALLEN-KEY FILTER TWO HIGH PERFORMANCE ACCELEROMETER AMPLIFIERS LOW NOISE HYDROPHONE AMPLIFIER BALANCING SOURCE IMPEDANCES OUTLINE DIMENSIONS Revision History
