Datasheet LTC3850, LTC3850-1 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Dual, 2-Phase Synchronous Step-Down Switching Controller |
| Pages / Page | 38 / 9 — PIN FUNCTIONS (GN/UF/UFD). RUN1, RUN2 (Pins 1, 13/Pins 26, 9/Pins 27, … |
| Revision | D |
| File Format / Size | PDF / 1.2 Mb |
| Document Language | English |
PIN FUNCTIONS (GN/UF/UFD). RUN1, RUN2 (Pins 1, 13/Pins 26, 9/Pins 27, 10):. LIM (Pin 14, LTC3850 Only/Pin 10/Pin 11):
Model Line for this Datasheet
- LTC3850EGN#PBF LTC3850EGN#TRPBF LTC3850EGN#WPBF LTC3850EGN#WTRPBF LTC3850EGN-1#PBF LTC3850EGN-1#TRPBF LTC3850EGN-1#WPBF LTC3850EGN-1#WTRPBF LTC3850EUF#PBF LTC3850EUF#TRPBF LTC3850EUFD#PBF LTC3850EUFD#TRPBF LTC3850IGN#PBF LTC3850IGN#TRPBF LTC3850IGN#WPBF LTC3850IGN#WTRPBF LTC3850IGN-1#PBF LTC3850IGN-1#TRPBF LTC3850IGN-1#WPBF LTC3850IGN-1#WTRPBF LTC3850IUF#PBF LTC3850IUF#TRPBF LTC3850IUFD#PBF LTC3850IUFD#TRPBF
Text Version of Document
LTC3850/LTC3850-1
PIN FUNCTIONS (GN/UF/UFD) RUN1, RUN2 (Pins 1, 13/Pins 26, 9/Pins 27, 10):
Run VIN > VEXTVCC at all times. On the GN package, EXTVCC is Control Inputs. A voltage above 1.2V on either pin turns the optional bonding in place of ILIM for LTC3850-1. In on the IC. However, forcing either of these pins below 1.2V the LTC3850-1, ILIM will default to 50mV. causes the IC to shut down that particular channel. There
I
are 0.5µA pull-up currents for these pins. Once the RUN
LIM (Pin 14, LTC3850 Only/Pin 10/Pin 11):
Current Comparator Sense Voltage Range Inputs. Tying this pin to pin rises above 1.2V, an additional 4.5µA pull-up current SGND, FLOAT or INTV is added to the pin. CC sets the maximum current sense threshold to three different levels for each comparator.
SENSE1+, SENSE2+ (Pins 2, 12/Pins 27, 8/Pins 28, 9): PGOOD (Pin 15/Pin 12/Pin 13):
Power Good Indicator Current Sense Comparator Inputs. The (+) inputs to the Output. Open-drain logic out that is pulled to ground when current comparators are normally connected to DCR either channel output exceeds the ±7.5% regulation window, sensing networks or current sensing resistors. after the internal 17µs power bad mask timer expires.
SENSE1–, SENSE2– (Pins 3, 11/Pins 28, 7/Pins 1, 8): PGND (Pin 19/Pin 16/Pin 17):
Power Ground Pin. Connect Current Sense Comparator Inputs. The (–) inputs to the this pin closely to the sources of the bottom N-channel current comparators are connected to the outputs. MOSFETs, the (–) terminal of CVCC and the (–) terminal
TK/SS1, TK/SS2 (Pins 4, 10/Pins 1, 6/Pins 2, 7):
Output of CIN. Voltage Tracking and Soft-Start Inputs. When one channel
INTV
is configured to be master of the two channels, a capaci-
CC (Pin 21/Pin 18/Pin 19):
Internal 5V Regulator Output. The control circuits are powered from this voltage. tor to ground at this pin sets the ramp rate for the master Decouple this pin to PGND with a 4.7µF low ESR tantalum channel’s output voltage. When the channel is configured or ceramic capacitor. to be the slave of two channels, the VFB voltage of the master channel is reproduced by a resistor divider and
VIN (Pin 22/Pin 19/Pin 20):
Main Input Supply. Decouple applied to this pin. Internal soft-start currents of 1.3µA this pin to PGND with a capacitor (0.1µF to 1µF). For charge the soft-start capacitors. applications where the main input power is 5V, tie the VIN and INTV
I
CC pins together.
TH1, ITH2 (Pins 5, 9/Pins 2, 5/Pins 3, 6):
Current Control Thresholds and Error Amplifier Compensation Points.
BG1, BG2 (Pins 23, 20/Pins 20, 17/Pins 21, 18):
Bottom Each associated channels’ current comparator tripping Gate Driver Outputs. These pins drive the gates of the threshold increases with its I bottom N-Channel MOSFETs and swings between PGND TH control voltage. and INTV
V
CC.
FB1, VFB2 (Pins 6, 8/Pins 3, 4/Pins 4, 5):
Error Amplifier Feedback Inputs. These pins receive the remotely sensed
BOOST1, BOOST2 (Pins 24, 18/Pins 21, 15/Pins 22, 16):
feedback voltages for each channel from external resistive Boosted Floating Driver Supplies. The (+) terminal of the dividers across the outputs. boost-strap capacitors connect to these pins. These pins swing from a diode voltage drop below INTV
SGND (Pin 7/Pin 29/Pin 29):
Signal Ground. All small-sig- CC up to VIN + INTV nal components and compensation components should CC. connect to this ground, which in turn connects to PGND
TG1, TG2 (Pins 25, 17/Pins 22, 14/Pins 23, 15):
Top Gate at one point. Pin 29 is the Exposed Pad, only available on Driver Outputs. These are the outputs of floating drivers the UF package. with a voltage swing equal to INTVCC superimposed on the switch nodes voltages.
EXTVCC (Pin 14, LTC3850-1 Only/Pin 11/Pin 12):
External Power Input to an Internal Switch Connected to INTV
SW1, SW2 (Pins 26, 16/Pins 23, 13/Pins 24, 14):
CC. This switch closes and supplies the IC power, bypassing Switch Node Connections to Inductors. Voltage swing the internal low dropout regulator, whenever EXTV at these pins are from a body diode voltage drop below CC is higher than 4.7V. Do not exceed 6V on this pin and ensure ground to VIN. Rev. D For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS (GN/UF/UFD) RUN1, RUN2 (Pins 1, 13/Pins 26, 9/Pins 27, 10):
Run VIN > VEXTVCC at all times. On the GN package, EXTVCC is Control Inputs. A voltage above 1.2V on either pin turns the optional bonding in place of ILIM for LTC3850-1. In on the IC. However, forcing either of these pins below 1.2V the LTC3850-1, ILIM will default to 50mV. causes the IC to shut down that particular channel. There
I
are 0.5µA pull-up currents for these pins. Once the RUN
LIM (Pin 14, LTC3850 Only/Pin 10/Pin 11):
Current Comparator Sense Voltage Range Inputs. Tying this pin to pin rises above 1.2V, an additional 4.5µA pull-up current SGND, FLOAT or INTV is added to the pin. CC sets the maximum current sense threshold to three different levels for each comparator.
SENSE1+, SENSE2+ (Pins 2, 12/Pins 27, 8/Pins 28, 9): PGOOD (Pin 15/Pin 12/Pin 13):
Power Good Indicator Current Sense Comparator Inputs. The (+) inputs to the Output. Open-drain logic out that is pulled to ground when current comparators are normally connected to DCR either channel output exceeds the ±7.5% regulation window, sensing networks or current sensing resistors. after the internal 17µs power bad mask timer expires.
SENSE1–, SENSE2– (Pins 3, 11/Pins 28, 7/Pins 1, 8): PGND (Pin 19/Pin 16/Pin 17):
Power Ground Pin. Connect Current Sense Comparator Inputs. The (–) inputs to the this pin closely to the sources of the bottom N-channel current comparators are connected to the outputs. MOSFETs, the (–) terminal of CVCC and the (–) terminal
TK/SS1, TK/SS2 (Pins 4, 10/Pins 1, 6/Pins 2, 7):
Output of CIN. Voltage Tracking and Soft-Start Inputs. When one channel
INTV
is configured to be master of the two channels, a capaci-
CC (Pin 21/Pin 18/Pin 19):
Internal 5V Regulator Output. The control circuits are powered from this voltage. tor to ground at this pin sets the ramp rate for the master Decouple this pin to PGND with a 4.7µF low ESR tantalum channel’s output voltage. When the channel is configured or ceramic capacitor. to be the slave of two channels, the VFB voltage of the master channel is reproduced by a resistor divider and
VIN (Pin 22/Pin 19/Pin 20):
Main Input Supply. Decouple applied to this pin. Internal soft-start currents of 1.3µA this pin to PGND with a capacitor (0.1µF to 1µF). For charge the soft-start capacitors. applications where the main input power is 5V, tie the VIN and INTV
I
CC pins together.
TH1, ITH2 (Pins 5, 9/Pins 2, 5/Pins 3, 6):
Current Control Thresholds and Error Amplifier Compensation Points.
BG1, BG2 (Pins 23, 20/Pins 20, 17/Pins 21, 18):
Bottom Each associated channels’ current comparator tripping Gate Driver Outputs. These pins drive the gates of the threshold increases with its I bottom N-Channel MOSFETs and swings between PGND TH control voltage. and INTV
V
CC.
FB1, VFB2 (Pins 6, 8/Pins 3, 4/Pins 4, 5):
Error Amplifier Feedback Inputs. These pins receive the remotely sensed
BOOST1, BOOST2 (Pins 24, 18/Pins 21, 15/Pins 22, 16):
feedback voltages for each channel from external resistive Boosted Floating Driver Supplies. The (+) terminal of the dividers across the outputs. boost-strap capacitors connect to these pins. These pins swing from a diode voltage drop below INTV
SGND (Pin 7/Pin 29/Pin 29):
Signal Ground. All small-sig- CC up to VIN + INTV nal components and compensation components should CC. connect to this ground, which in turn connects to PGND
TG1, TG2 (Pins 25, 17/Pins 22, 14/Pins 23, 15):
Top Gate at one point. Pin 29 is the Exposed Pad, only available on Driver Outputs. These are the outputs of floating drivers the UF package. with a voltage swing equal to INTVCC superimposed on the switch nodes voltages.
EXTVCC (Pin 14, LTC3850-1 Only/Pin 11/Pin 12):
External Power Input to an Internal Switch Connected to INTV
SW1, SW2 (Pins 26, 16/Pins 23, 13/Pins 24, 14):
CC. This switch closes and supplies the IC power, bypassing Switch Node Connections to Inductors. Voltage swing the internal low dropout regulator, whenever EXTV at these pins are from a body diode voltage drop below CC is higher than 4.7V. Do not exceed 6V on this pin and ensure ground to VIN. Rev. D For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
