Datasheet ADA4830-1, ADA4830-2 (Analog Devices) - 5

ManufacturerAnalog Devices
DescriptionHigh Speed Difference Amplifier with Input Short-to-Battery Protection
Pages / Page22 / 5 — Data Sheet. ADA4830-1/ADA4830-2. Parameter. Test Conditions/Comments. …
RevisionC
File Format / SizePDF / 463 Kb
Document LanguageEnglish

Data Sheet. ADA4830-1/ADA4830-2. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit

Data Sheet ADA4830-1/ADA4830-2 Parameter Test Conditions/Comments Min Typ Max Unit

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Data Sheet ADA4830-1/ADA4830-2 Parameter Test Conditions/Comments Min Typ Max Unit
VOLTAGE REFERENCE INPUT Input Voltage Range 0.2 to 2.2 V Input Resistance 20 kΩ Gain VREF to VOUT 1 V/V LOGIC OUTPUT/INPUT CHARACTERISTICS STB VOH VIN ≤ 7.4 V (normal operation) 3.3 V STB VOL VIN ≥ 8.2 V (fault condition), ADA4830-1/ADA4830-2 85/178 mV ENA VIH Voltage to enable device ≥1.8 V ENA VIL Voltage to disable device ≤0.8 V OUTPUT CHARACTERISTICS Output Voltage Swing RL = 150 Ω to ground 0.01 to 3.08 V Linear Output Current <1% THD at 100 kHz 50 mA Short-Circuit Current Sourcing/sinking 85/180 mA Capacitive Load Drive Peaking ≤ 4 dB 47 pF POWER SUPPLY Operating Range Operation outside of this range results in 2.9 5.5 V performance degradation Quiescent Current per Amplifier Enabled (ENA = 3.3 V), no load 5.5 8.0 mA ADA4830-1W/ADA4830-2W only TMIN to TMAX 8.4 mA Disabled (ENA = 0 V), no load 60 µA VIN = 18 V (short-to-battery), no load 4.3 mA Power Supply Rejection Ratio (PSRR) +VS = 3.0 V to 3.6 V, VREF forced to 1.65 V 42 dB OPERATING TEMPERATURE RANGE −40 +125 °C Rev. C | Page 5 of 22 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications 5 V Operation 3.3 V Operation Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Core Amplifier Overvoltage (Short-to-Battery) Protection Short-to-Battery Output Flag ESD Protection Power Supply Pins (ADA4830-2) Applications Information Methods of Transmission Pseudo Differential Mode (Unbalanced Source Termination) Pseudo Differential Mode (Balanced Source Impedance) Fully Differential Mode Voltage Reference (VREF Pin) Input Common-Mode Range Short-to-Battery Output Flag Pin Enable/Disable Modes (ENA Pin) PCB Layout Exposed Paddle (EPAD) Connection Using the ADA4830-2 as a Low Cost Video Switch Driving Capacitive Loads Typical Applications Circuits Fully DC-Coupled Transmission Line Packaging and Ordering Information Outline Dimensions Ordering Guide Automotive Products
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