Datasheet GD32E503xx (GigaDevice) - 27

GD32E503xx Datasheet
Pin I/O Pin Name Pins Functions description(3) Type(1) Level(2)
Default: NJTRST Alternate1: SHRTIMER_EXEV6, I2C2_SDA, PB4 134 I/O 5VT I2S2_ADD_SD Alternate2: SPI2_MISO, I2C0_TXFRAME Remap: TIMER2_CH0, PB4, SPI0_MISO Default: PB5 Alternate1: SHRTIMER_EXEV5, I2C2_SCL PB5 135 I/O Alternate2: I2C0_SMBA, SPI2_MOSI, I2S2_SD, WKUP5 Remap: TIMER2_CH1, SPI0_MOSI, CAN1_RX Default: PB6 Alternate1: SHRTIMER_SCIN, SHRTIMER_EXEV3 PB6 136 I/O 5VT Alternate2: I2C0_SCL, TIMER3_CH0 Remap: USART0_TX, CAN1_TX, SPI0_IO2 Default: PB7 Alternate1: SHRTIMER_EXEV2 PB7 137 I/O 5VT Alternate2: I2C0_SDA , TIMER3_CH1, EXMC_NADV Remap: USART0_RX, SPI0_IO3 BOOT0 138 I Default: BOOT0 Default: PB8 Alternate1: SHRTIMER_EXEV7, I2C2_SDA PB8 139 I/O 5VT Alternate2: TIMER3_CH2, SDIO_D4, TIMER9_CH0(4) Remap: I2C0_SCL, CAN0_RX Default: PB9 Alternate1: SHRTIMER_EXEV4 PB9 140 I/O 5VT Alternate2: TIMER3_CH3, SDIO_D5, TIMER10_CH0(4) Remap: I2C0_SDA, CAN0_TX Default: PE0 PE0 141 I/O 5VT Alternate1: SHRTIMER_SCIN Alternate2: TIMER3_ETI, EXMC_NBL0 Default: PE1 PE1 142 I/O 5VT Alternate1: SHRTIMER_SCOUT Alternate2: EXMC_NBL1 VSS_3 143 P Default: VSS_3 VDD_3 144 P Default: VDD_3
Notes:
(1) Type: I = input, O = output, P = power. (2) I/O Level: 5VT = 5 V tolerant. (3) Alternate1: The specified function can be mapped to the specific pin by configuring AFIO_PCFA ~ AFIO_PCFG registers. Alternate2: These functions can be enabled with correct GPIO and function module mode configurations. Remap: A group of the specified module functions can be mapped to the specified pins 26 Document Outline Table of Contents List of Figures List of Tables 1. General description 2. Device overview 2.1. Device information 2.2. Block diagram 2.3. Pinouts and pin assignment 2.4. Memory map 2.5. Clock tree 2.6. Pin definitions 2.6.1. GD32E503Zx LQFP144 pin definitions 2.6.2. GD32E503Vx LQFP100 pin definitions 2.6.3. GD32E503Rx LQFP64 pin definitions 2.6.4. GD32E503Cx LQFP48 pin definitions 3. Functional description 3.1. Arm® Cortex®-M33 core 3.2. Embedded memory 3.3. Clock, reset and supply management 3.4. Boot modes 3.5. Power saving modes 3.6. Analog to digital converter (ADC) 3.7. Digital to analog converter (DAC) 3.8. DMA 3.9. General-purpose inputs/outputs (GPIOs) 3.10. Timers and PWM generation 3.11. Real time clock (RTC) 3.12. Inter-integrated circuit (I2C) 3.13. Serial peripheral interface (SPI) 3.14. Universal synchronous asynchronous receiver transmitter (USART) 3.15. Inter-IC sound (I2S) 3.16. Universal Serial Bus full-speed device interface (USBD) 3.17. Controller area network (CAN) 3.18. External memory controller (EXMC) 3.19. Secure digital input/output interface (SDIO) 3.20. Super High-Resolution Timer (SHRTIMER) 3.21. Serial/Quad Parallel Interface (SQPI) 3.22. Debug mode 3.23. Package and operation temperature 4. Electrical characteristics 4.1. Absolute maximum ratings 4.2. Operating conditions characteristics 4.3. Power consumption 4.4. EMC characteristics 4.5. Power supply supervisor characteristics 4.6. Electrical sensitivity 4.7. External clock characteristics 4.8. Internal clock characteristics 4.9. PLL characteristics 4.10. Memory characteristics 4.11. NRST pin characteristics 4.12. GPIO characteristics 4.13. Temperature sensor characteristics 4.14. ADC characteristics 4.15. DAC characteristics 4.16. I2C characteristics 4.17. SPI characteristics 4.18. I2S characteristics 4.19. USART characteristics 4.20. CAN characteristics 4.21. USBD characteristics 4.22. SDIO characteristics 4.23. EXMC characteristics 4.24. Serial/Quad Parallel Interface (SQPI) characteristics 4.25. Super High-Resolution Timer (SHRTIMER) characteristics 4.26. TIMER characteristics 4.27. WDGT characteristics 4.28. Parameter condition 5. Package information 5.1. LQFP144 package outline dimensions 5.2. LQFP100 package outline dimensions 5.3. LQFP64 package outline dimensions 5.4. LQFP48 package outline dimensions 6. Ordering information 7. Revision history