Datasheet PMG1-S2 (Infineon) - 20

PMG1-S2 Datasheet Table 7. AC Specifications (Guaranteed by Characterization) Spec ID Parameter Description Min Typ Max Units Details/Conditions
SID.CLK#4 FCPU CPU input frequency DC – 48 MHz All VDDD SID.PWR#20 TSLEEP Wakeup from sleep mode – 0 – µs – SID.PWR#21 TDEEPSLEEP Wakeup from Deep Sleep mode – – 35 µs – SID.XRES#5 TXRES External reset pulse width 5 – – µs All VDDIO SYS.FES#1 T Power-up to “Ready to accept I2C/CC _PWR_RDY command” – 5 25 ms – I/O
Table 8. I/O DC Specifications Spec ID Parameter Description Min Typ Max Units Details/Conditions
SID.GIO#37 VIH_CMOS Input voltage HIGH threshold 0.7 × VDDIO – – V CMOS input SID.GIO#38 VIL_CMOS Input voltage LOW threshold – – 0.3 × VDDIO V CMOS input SID.GIO#39 VIH_VDDIO2.7- LVTTL input, VDDIO < 2.7 V 0.7× VDDIO – – V – SID.GIO#40 VIL_VDDIO2.7- LVTTL input, VDDIO < 2.7 V – – 0.3 × VDDIO V – SID.GIO#41 VIH_VDDIO2.7+ LVTTL input, VDDIO  2.7 V 2.0 – – V – SID.GIO#42 VIL_VDDIO2.7+ LVTTL input, VDDIO  2.7 V – – 0.8 V – SID.GIO#33 VOH_3V Output voltage HIGH level VDDIO –0.6 – – V IOH = 4 mA at 3V VDDIO SID.GIO#34 VOH_1.8V Output voltage HIGH level VDDIO –0.5 – – V IOH = 1 mA at 1.8V VDDIO SID.GIO#35 VOL_1.8V Output voltage LOW level – – 0.6 V IOL = 4 mA at 1.8V VDDIO SID.GIO#36 VOL_3V Output voltage LOW level – – 0.6 V IOL = 4 mA at 3V VDDIO for SBU and AUX pins SID.GIO#5 RPU Pull-up resistor value 3.5 5.6 8.5 k +25 °C TA, all VDDIO SID.GIO#6 RPD Pull-down resistor value 3.5 5.6 8.5 k +25 °C TA, all VDDIO +25 °C TA, all VDDIO. SID.GIO#16 I Input leakage current IL – – 2 nA Guaranteed by (absolute value) characterization. All VDDIO, all packages, SID.GIO#17 C all I/Os except SBU and PIN Max pin capacitance – 3.0 7 pF AUX. Guaranteed by characterization. All VDDIO, all packages, SID.GIO#17A CPIN_SBU Max pin capacitance – 16 18 pF SBU pins only. Guaranteed by characterization. All VDDIO, all packages, SID.GIO#17B CPIN_AUX Max pin capacitance – 12 14 pF AUX pins only. Guaranteed by characterization. SID.GIO#43 V Input hysteresis, LVTTL HYSTTL VDDIO  2.7 V 15 40 – mV Guaranteed by characterization VDDIO < 4.5 V. SID.GIO#44 VHYSCMOS Input hysteresis CMOS 0.05 × VDDIO – – mV Guaranteed by characteri- zation. SID69 I Current through protection DIODE diode to VDDIO/Vss – – 100 µA Guaranteed by characteri- zation Maximum total sink chip Guaranteed by characteri- SID.GIO#45 ITOT_GPIO current – – 85 mA zation Document Number: 002-31598 Rev. *B Page 19 of 33 Document Outline PMG1-S2 Datasheet Power Delivery Microcontroller Gen1 PMG1 Family General Description PMG1-S2 General Description Features Type-C and USB-PD Support 32-bit MCU Subsystem Integrated Digital Blocks Clocks and Oscillators Power System-Level ESD Protection Packages Block Diagram Contents Development Support Documentation Online Tools ModusToolbox™ IDE and the PMG1 SDK Functional Overview CPU and Memory Subsystem Crypto Block Integrated Billboard Device USB-PD Subsystem (USBPD SS) Full-Speed USB Subsystem Peripherals GPIO Power Systems Overview Pinouts Application Diagrams Electrical Specifications Absolute Maximum Ratings Device-Level Specifications Digital Peripherals System Resources Ordering Information Ordering Code Definitions Packaging Acronyms Document Conventions Units of Measure Document History Page Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC® Solutions Cypress Developer Community Technical Support