Datasheet ADG1206, ADG1207 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Low Capacitance, 16-and 8-Channel, ±15 V/+12 V iCMOS Multiplexers |
| Pages / Page | 20 / 8 — ADG1206/ADG1207. Data Sheet. PIN CONFIGURATIONS AND FUNCTION … |
| Revision | C |
| File Format / Size | PDF / 386 Kb |
| Document Language | English |
ADG1206/ADG1207. Data Sheet. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. CI CI CI. 28 D. NIC 2. 27 VSS. NIC 3. 26 S8. S16 1. 24 S8. S15 2
Model Line for this Datasheet
Text Version of Document
ADG1206/ADG1207 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS CI D S D CI CI CI CI S N V N D N N N V V 1 DD 28 D 32 31 30 29 28 27 26 25 NIC 2 27 VSS NIC 3 26 S8 S16 1 24 S8 S15 2 23 S7 S16 4 25 S7 S14 3 22 S6 ADG1206 S15 5 24 S6 S13 4 21 S5 S12 5 TOP VIEW 20 S4 S14 6 23 S5 (Not to Scale) ADG1206 S11 6 19 S3 S13 7 22 S4 S10 7 18 S2 TOP VIEW S9 8 17 S1 S12 8 (Not to Scale) 21 S3 S11 9 20 S2 9 10 11 12 13 14 15 16 S10 3 2 1 0 10 19 S1 D C C N N A A I I A A E G N N S9 11 18 EN 1. NIC = NO INTERNAL CONNECTION. GND 12 17 A0
004
2. THE EXPOSED PAD MUST BE TIED
19-
NIC TO THE SUBSTRATE, V 13 16 A1 SS.
061
A3 14 15 A2
3 00 9-
NIC = NO INTERNAL CONNECTION
611 0
Figure 3. 28-Lead TSSOP Pin Configuration (ADG1206) Figure 4. 32-Lead LFCSP Pin Configuration (ADG1206)
Table 4. ADG1206 Pi n Function Descriptions Pin No. TSSOP LFCSP Mnemonic Description
1 31 VDD Most Positive Power Supply Potential. 2, 3, 13 12, 13, 26, 27, NIC No Internal Connection. 28, 30, 32 4 1 S16 Source Terminal 16. Can be an input or an output. 5 2 S15 Source Terminal 15. Can be an input or an output. 6 3 S14 Source Terminal 14. Can be an input or an output. 7 4 S13 Source Terminal 13. Can be an input or an output. 8 5 S12 Source Terminal 12. Can be an input or an output. 9 6 S11 Source Terminal 11. Can be an input or an output. 10 7 S10 Source Terminal 10. Can be an input or an output. 11 8 S9 Source Terminal 9. Can be an input or an output. 12 9 GND Ground (0 V) Reference. 14 10 A3 Logic Control Input. 15 11 A2 Logic Control Input. 16 14 A1 Logic Control Input. 17 15 A0 Logic Control Input. 18 16 EN Active High Digital Input. When this pin is low, the device is disabled and all switches are turned off. When this pin is high, the Ax logic inputs determine which switch is turned on. 19 17 S1 Source Terminal 1. Can be an input or an output. 20 18 S2 Source Terminal 2. Can be an input or an output. 21 19 S3 Source Terminal 3. Can be an input or an output. 22 20 S4 Source Terminal 4. Can be an input or an output. 23 21 S5 Source Terminal 5. Can be an input or an output. 24 22 S6 Source Terminal 6. Can be an input or an output. 25 23 S7 Source Terminal 7. Can be an input or an output. 26 24 S8 Source Terminal 8. Can be an input or an output. 27 25 VSS Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. 28 29 D Drain Terminal. Can be an input or an output. Not 0 EPAD Exposed Pad. The exposed pad must be tied to the substrate, VSS. applicable Rev. C | Page 8 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
004
2. THE EXPOSED PAD MUST BE TIED
19-
NIC TO THE SUBSTRATE, V 13 16 A1 SS.
061
A3 14 15 A2
3 00 9-
NIC = NO INTERNAL CONNECTION
611 0
Figure 3. 28-Lead TSSOP Pin Configuration (ADG1206) Figure 4. 32-Lead LFCSP Pin Configuration (ADG1206)
Table 4. ADG1206 Pi n Function Descriptions Pin No. TSSOP LFCSP Mnemonic Description
1 31 VDD Most Positive Power Supply Potential. 2, 3, 13 12, 13, 26, 27, NIC No Internal Connection. 28, 30, 32 4 1 S16 Source Terminal 16. Can be an input or an output. 5 2 S15 Source Terminal 15. Can be an input or an output. 6 3 S14 Source Terminal 14. Can be an input or an output. 7 4 S13 Source Terminal 13. Can be an input or an output. 8 5 S12 Source Terminal 12. Can be an input or an output. 9 6 S11 Source Terminal 11. Can be an input or an output. 10 7 S10 Source Terminal 10. Can be an input or an output. 11 8 S9 Source Terminal 9. Can be an input or an output. 12 9 GND Ground (0 V) Reference. 14 10 A3 Logic Control Input. 15 11 A2 Logic Control Input. 16 14 A1 Logic Control Input. 17 15 A0 Logic Control Input. 18 16 EN Active High Digital Input. When this pin is low, the device is disabled and all switches are turned off. When this pin is high, the Ax logic inputs determine which switch is turned on. 19 17 S1 Source Terminal 1. Can be an input or an output. 20 18 S2 Source Terminal 2. Can be an input or an output. 21 19 S3 Source Terminal 3. Can be an input or an output. 22 20 S4 Source Terminal 4. Can be an input or an output. 23 21 S5 Source Terminal 5. Can be an input or an output. 24 22 S6 Source Terminal 6. Can be an input or an output. 25 23 S7 Source Terminal 7. Can be an input or an output. 26 24 S8 Source Terminal 8. Can be an input or an output. 27 25 VSS Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. 28 29 D Drain Terminal. Can be an input or an output. Not 0 EPAD Exposed Pad. The exposed pad must be tied to the substrate, VSS. applicable Rev. C | Page 8 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
