Datasheet BA76220 (Holtek) - 6
| Manufacturer | Holtek |
| Description | PIR Controller |
| Pages / Page | 21 / 6 — BA76220. PIR Controller. Electrical Characteristics. Test Condition. … |
| File Format / Size | PDF / 779 Kb |
| Document Language | English |
BA76220. PIR Controller. Electrical Characteristics. Test Condition. Symbol. Parameter. Min. Typ. Max. Unit. VDD. Condition
Model Line for this Datasheet
Text Version of Document
BA76220 PIR Controller Electrical Characteristics
Ta=-40°C~85°C, unless otherwise specified
Test Condition Symbol Parameter Min. Typ. Max. Unit VDD Condition
VDD Operating Voltage — — 2.2 3.3 5.5 V — CVREG=0.1μF, VREG[1:0]=01B -3% 2.0 3% V VREG(Note) Regulator Voltage — CVREG=0.1μF, VREG[1:0]=00B -3% 2.2 3% V — CVREG=0.1μF, VREG[1:0]=10/11B -3% 2.4 3% V IREG Driving Current 5V CVREG=0.1μF, ΔVOUT=-3% 1 — — mA 5V — 17 23 μA ISTB Standby Current DT off, OPAMP on 3V — 12 17 μA IOH OUTPUT Source Current 5V/3V VOH=0.9VDD -5 -10 — mA IOL OUTPUT Sink Current 5V/3V VOL=0.1VDD 10 20 — mA VIH MODE High Input Voltage — — 0.7VDD — — V VIL MODE Low Input Voltage — — — — 0.3VDD V VOS Operational Amplifier Input Offset Voltage 3V — -10 — 10 mV fSYS System Oscillator Frequency 5V/3V IRC -2% 32 2% kHz VREG, f RDT=30kΩ, DT Delay Time Frequency 3V ERC C -10% 16 10% kHz DT=3000pF, @25°C AOL Operational Amplifier Open Loop Gain 3V RLOAD=1MΩ, CLOAD=60pF 60 80 — dB GBW Operational Amplifier Gain Band Bandwidth 3V RLOAD=1MΩ, CLOAD=60pF 2 4 — kHz VPIRH Comparator Window High Level — (1/2)VREG+(1/6)VREG -5% 1.33 5% V VPIRL Comparator Window Low Level — (1/2)VREG-(1/6)VREG -5% 0.66 5% V Note: When VDD is less than VREG+0.1V, then the VREG voltage will be equal to VDD. If the VREG voltage is less than the PIR operating voltage, then the PIR sensor will not operate normally. Rev. 1.00 6 September 08, 2025 Document Outline Features Applications General Description Block Diagram Pin Assignment Pin Description Absolute Maximum Ratings Electrical Characteristics Functional Description TEST SC DT MODE CDS OUTPUT LVD Trigger Timing Retrigger LVD & CDS Detect Circuit The Criterion of LVD and CDS The Criterion of MODE Conditions for Disabling the PIR Amplifier Circuit Selection of OSC or DT Write ROM & Data Updated Communication Write/Read Value Protocol Registers PIR Amplifier Power-on Flow Application Circuits OTP-based Application Circuit RC-based Application Circuit Package Information 16-pin NSOP (150mil) Outline Dimensions
Ta=-40°C~85°C, unless otherwise specified
Test Condition Symbol Parameter Min. Typ. Max. Unit VDD Condition
VDD Operating Voltage — — 2.2 3.3 5.5 V — CVREG=0.1μF, VREG[1:0]=01B -3% 2.0 3% V VREG(Note) Regulator Voltage — CVREG=0.1μF, VREG[1:0]=00B -3% 2.2 3% V — CVREG=0.1μF, VREG[1:0]=10/11B -3% 2.4 3% V IREG Driving Current 5V CVREG=0.1μF, ΔVOUT=-3% 1 — — mA 5V — 17 23 μA ISTB Standby Current DT off, OPAMP on 3V — 12 17 μA IOH OUTPUT Source Current 5V/3V VOH=0.9VDD -5 -10 — mA IOL OUTPUT Sink Current 5V/3V VOL=0.1VDD 10 20 — mA VIH MODE High Input Voltage — — 0.7VDD — — V VIL MODE Low Input Voltage — — — — 0.3VDD V VOS Operational Amplifier Input Offset Voltage 3V — -10 — 10 mV fSYS System Oscillator Frequency 5V/3V IRC -2% 32 2% kHz VREG, f RDT=30kΩ, DT Delay Time Frequency 3V ERC C -10% 16 10% kHz DT=3000pF, @25°C AOL Operational Amplifier Open Loop Gain 3V RLOAD=1MΩ, CLOAD=60pF 60 80 — dB GBW Operational Amplifier Gain Band Bandwidth 3V RLOAD=1MΩ, CLOAD=60pF 2 4 — kHz VPIRH Comparator Window High Level — (1/2)VREG+(1/6)VREG -5% 1.33 5% V VPIRL Comparator Window Low Level — (1/2)VREG-(1/6)VREG -5% 0.66 5% V Note: When VDD is less than VREG+0.1V, then the VREG voltage will be equal to VDD. If the VREG voltage is less than the PIR operating voltage, then the PIR sensor will not operate normally. Rev. 1.00 6 September 08, 2025 Document Outline Features Applications General Description Block Diagram Pin Assignment Pin Description Absolute Maximum Ratings Electrical Characteristics Functional Description TEST SC DT MODE CDS OUTPUT LVD Trigger Timing Retrigger LVD & CDS Detect Circuit The Criterion of LVD and CDS The Criterion of MODE Conditions for Disabling the PIR Amplifier Circuit Selection of OSC or DT Write ROM & Data Updated Communication Write/Read Value Protocol Registers PIR Amplifier Power-on Flow Application Circuits OTP-based Application Circuit RC-based Application Circuit Package Information 16-pin NSOP (150mil) Outline Dimensions