Datasheet GD32E103xx (GigaDevice) - 8

GD32E103xx Datasheet
1. General description
The GD32E103xx device belongs to the connectivity line of GD32 MCU Family. It is a 32-bit general-purpose microcontroller based on the Arm® Cortex®-M4 RISC core with best cost- performance ratio in terms of enhanced processing capacity, reduced power consumption and peripheral set. The Cortex®-M4 core features implements a full set of DSP instructions to address digital signal control markets that demand an efficient, easy-to-use blend of control and signal processing capabilities. It also provides powerful trace technology for enhanced application security and advanced debug support. The GD32E103xx device incorporates the Arm® Cortex®-M4 32-bit processor core operating at 120 MHz frequency with Flash accesses to obtain maximum efficiency. It provides up to 128 KB on-chip Flash memory and 32 KB SRAM memory. An extensive range of enhanced I/Os and peripherals connected to two APB buses. The devices offer up to two 12-bit 3 MSPS ADCs, two 12-bit DACs, up to ten general 16-bit timers, two 16-bit PWM advanced timers, and two 16-bit basic timers, as well as standard and advanced communication interfaces: up to three SPIs, two I2Cs, three USARTs and two UARTs, two I2Ss and an USBFS. The device operates from 1.71 to 3.6 V power supply and available in –40 to +85 °C temperature range for grade 6 devices, and -40°C to +105°C temperature range for grade 7 devices. Several power saving modes provide the flexibility for maximum optimization between wakeup latency and power consumption, an especially important consideration in low power applications. The above features make GD32E103xx devices suitable for a wide range of interconnection and advanced applications, especially in areas such as industrial control, motor drives, consumer and handheld equipment, human machine interface, security and alarm systems, POS, automotive navigation, IoT and so on. 7 Document Outline Table of Contents List of Figures List of Tables 1. General description 2. Device overview 2.1. Device information 2.2. Block diagram 2.3. Pinouts and pin assignment 2.4. Memory map 2.5. Clock tree 2.6. Pin definitions 2.6.1. GD32E103Vx LQFP100 pin definitions 2.6.2. GD32E103Rx LQFP64 pin definitions 2.6.3. GD32E103Cx LQFP48 pin definitions 2.6.4. GD32E103Tx QFN36 pin definitions 3. Functional description 3.1. Arm® Cortex®-M4 core 3.2. On-chip memory 3.3. Clock, reset and supply management 3.4. Boot modes 3.5. Power saving modes 3.6. Analog to digital converter (ADC) 3.7. Digital to analog converter (DAC) 3.8. DMA 3.9. General-purpose inputs/outputs (GPIOs) 3.10. Timers and PWM generation 3.11. Real time clock (RTC) 3.12. Inter-integrated circuit (I2C) 3.13. Serial peripheral interface (SPI) 3.14. Universal synchronous asynchronous receiver transmitter (USART) 3.15. Inter-IC sound (I2S) 3.16. Universal serial bus full-speed interface (USBFS) 3.17. External memory controller (EXMC) 3.18. Debug mode 3.19. Package and operation temperature 4. Electrical characteristics 4.1. Absolute maximum ratings 4.2. Operating conditions characteristics 4.3. Power consumption 4.4. EMC characteristics 4.5. Power supply supervisor characteristics 4.6. Electrical sensitivity 4.7. External clock characteristics 4.8. Internal clock characteristics 4.9. PLL characteristics 4.10. Memory characteristics 4.11. NRST pin characteristics 4.12. GPIO characteristics 4.13. ADC characteristics 4.14. Temperature sensor characteristics 4.15. DAC characteristics 4.16. I2C characteristics 4.17. SPI characteristics 4.18. I2S characteristics 4.19. USART characteristics 4.20. USBFS characteristics 4.21. EXMC characteristics 4.22. TIMER characteristics 4.23. WDGT characteristics 4.24. Parameter conditions 5. Package information 5.1. LQFP100 package outline dimensions 5.2. LQFP64 package outline dimensions 5.3. LQFP48 package outline dimensions 5.4. QFN36 package outline dimensions 5.5. Thermal characteristics 6. Ordering information 7. Revision history