Datasheet ESP32-C3 (Espressif) - 4

link to page 70 link to page 12 link to page 12 link to page 70 • ROM: 384 KB • SRAM: 400 KB (16 KB for cache) • SRAM in RTC: 8 KB • 4096-bit eFuse memory, up to 1792 bits for users • In-package flash (see details in Chapter 1 ESP32-C3 Series Comparison) • Supported SPI protocols: SPI, Dual SPI, Quad SPI, and QPI interfaces that allow connection to multiple off-package flash and other SPI devices • Access to flash accelerated by cache • Supports flash in-Circuit Programming (ICP) Peripherals • Programmable GPIOs – 22 for SP32-C3, ESP32-C3FH4, ESP32-C3FN4 and ESP32-C3FH8X * 3 strapping GPIOs * 6 GPIOs allocated for in-package flash – 16 for ESP32-C3FH4X and ESP32-C3FH4AZ * 3 strapping GPIOs • Connectivity interfaces: – Two UARTs – Three SPI – I2C – I2S – Full-speed USB Serial/JTAG controller – TWAI® controller compatible with ISO 11898-1 (CAN Specification 2.0) – LED PWM controller, with up to 6 channels – Remote control peripheral, with 2 transmit channels and 2 receive channels • Analog signal processing: – Two 12-bit SAR ADCs, up to 6 channels – Temperature sensor • Timers: – Two 54-bit general-purpose timers – Three digital watchdog timers – Analog watchdog timer – 52-bit system timer Espressif Systems 4 ESP32-C3 Series Datasheet v2.3 Submit Documentation Feedback Document Outline Product Overview Features Applications 1 ESP32-C3 Series Comparison 1.1 Nomenclature 1.2 Comparison 1.3 Chip Revision 2 Pins 2.1 Pin Layout 2.2 Pin Overview 2.3 IO Pins 2.3.1 IO MUX Functions 2.3.2 Analog Functions 2.3.3 Restrictions for GPIOs 2.3.4 Peripheral Pin Assignment 2.4 Analog Pins 2.5 Power Supply 2.5.1 Power Pins 2.5.2 Power Scheme 2.5.3 Chip Power-up and Reset 2.6 Pin Mapping Between Chip and Flash 3 Boot Configurations 3.1 Chip Boot Mode Control 3.2 ROM Messages Printing Control 4 Functional Description 4.1 System 4.1.1 Microprocessor and Master 4.1.1.1 High-Performance CPU 4.1.1.2 GDMA Controller 4.1.2 Memory Organization 4.1.2.1 Internal Memory 4.1.2.2 External Memory 4.1.2.3 Cache 4.1.2.4 eFuse Controller 4.1.3 System Components 4.1.3.1 IO MUX and GPIO Matrix 4.1.3.2 Reset 4.1.3.3 Clock 4.1.3.4 Interrupt Matrix 4.1.3.5 System Timer 4.1.3.6 Power Management Unit 4.1.3.7 Timer Group 4.1.3.8 Watchdog Timers 4.1.3.9 XTAL32K Watchdog Timers (XTWDT) 4.1.3.10 Permission Control 4.1.3.11 World Controller (WCL) 4.1.3.12 System Registers 4.1.3.13 Debug Assistant 4.1.4 Cryptography and Security Component 4.1.4.1 AES Accelerator 4.1.4.2 HMAC Accelerator 4.1.4.3 RSA Accelerator 4.1.4.4 SHA Accelerator 4.1.4.5 Digital Signature 4.1.4.6 External Memory Encryption and Decryption 4.1.4.7 Random Number Generator 4.1.4.8 Clock Glitch Detection 4.2 Peripherals 4.2.1 Connectivity Interface 4.2.1.1 UART Controller 4.2.1.2 SPI Controller 4.2.1.3 I2C Controller 4.2.1.4 I2S Controller 4.2.1.5 USB Serial/JTAG Controller 4.2.1.6 Two-wire Automotive Interface 4.2.1.7 LED PWM Controller 4.2.1.8 Remote Control Peripheral 4.2.2 Analog Signal Processing 4.2.2.1 SAR ADC 4.2.2.2 Temperature Sensor 4.3 Wireless Communication 4.3.1 Radio 4.3.1.1 2.4 GHz Receiver 4.3.1.2 2.4 GHz Transmitter 4.3.1.3 Clock Generator 4.3.2 Wi-Fi 4.3.2.1 Wi-Fi Radio and Baseband 4.3.2.2 Wi-Fi MAC 4.3.2.3 Networking Features 4.3.3 Bluetooth LE 4.3.3.1 Bluetooth LE PHY 4.3.3.2 Bluetooth LE Link Controller 5 Electrical Characteristics 5.1 Absolute Maximum Ratings 5.2 Recommended Operating Conditions 5.3 VDD_SPI Output Characteristics 5.4 DC Characteristics (3.3 V, 25 °C) 5.5 ADC Characteristics 5.6 Current Consumption 5.6.1 RF Current Consumption in Active Mode 5.6.2 Current Consumption in Other Modes 5.7 Memory Specifications 5.8 Reliability 6 RF Characteristics 6.1 Wi-Fi Radio 6.1.1 Wi-Fi RF Transmitter (TX) Characteristics 6.1.2 Wi-Fi RF Receiver (RX) Characteristics 6.2 Bluetooth 5 (LE) Radio 6.2.1 Bluetooth LE RF Transmitter (TX) Characteristics 6.2.2 Bluetooth LE RF Receiver (RX) Characteristics 7 Packaging ESP32-C3 Consolidated Pin Overview ESP32-C3 Chip Series Group Overview Datasheet Versioning Glossary Related Documentation and Resources Revision History