Datasheet TPD7110F (Toshiba) - 9

TPD7110F
10. Electrical Characteristics Table 10.1 Electrical Characteristics
(Unless otherwise specified, Tj = -40 to 125 °C, VDD = 3 to 32 V)
Item Symbol Test Conditions Min Typ. Max Unit
Refer to test circuit 1 IDD(ON1) VDD = 12 V, VIN = 5 V - 100 150 μA Tj = 25 °C Refer to test circuit 1 IDD(ON2) VDD = 32 V, VIN = 5 V - - 280 μA Tj = -40 °C to 125 °C
Supply current
Refer to test circuit 1 IDD(OFF1) VDD = 12 V, VIN = 0 V 2 3 μA Tj = 25 °C Refer to test circuit 1 IDD(OFF2) VDD = 32 V, VIN = 0 V - 10 μA Tj = -40 °C to 125 °C
High level input voltage
VIH - 2.4 - - V
Low level input voltage
VIL - - - 0.6 V
Input voltage hysteresis
VIHYS - - 0.5 - V
High level input current
IIH VIN = 5 V - 0.3 1.0 μA
Low level input current
IIL VIN = 0 V -2.0 -0.3 - μA Refer to test circuit 2
High level output voltage(1)
VGS(1) VDD = 3 V to 4.8 V, 6.0 7.0 8.0 V VIN = 5 V Refer to test circuit 2
High level output voltage(2)
VGS(2) VDD = 4.8 V to 6 V, 6.0 - 13.5 V VIN = 5 V Refer to test circuit 2
High level output voltage(3)
VGS(3) VDD = 6 V to 32 V, 10.0 12.0 13.5 V VIN = 5 V Refer to test circuit 2
Low level output voltage
VGSL - - 0.5 V VIN = 0 V
Output clamp voltage
VCL - 15.5 18.0 19.5 V
Overvoltage detection voltage
VOVH - 33 36 39 V
Overvoltage release voltage
VOVL - 32 - - V
Overvoltage detection hysteresis
VOVHYS - - 1 - V
Undervoltage detection voltage
VUVL - 2.4 - 2.9 V
Undervoltage release voltage
VUVH - - - 3.0 V
Undervoltage detection hysteresis
VUVHYS - - 0.1 - V
Output resistance
RSINK Refer to test circuit 3 - 30 40 Ω
Reverse current blocking
Refer to test circuit 4 V 20 30 40 mV
threshold voltage
RC Tj = 25 °C
Reverse current blocking
Refer to test circuit 4 V - - 23 mV
release voltage
RCr Tj = 25 °C
Reverse current blocking
Refer to test circuit 4 V - 22 - mV
voltage hysteresis
RCHYS Tj = 25 °C ©202 5 9 2025-09-04 Toshiba Electronic Devices & Storage Corporation Rev. 1.0