Datasheet 74AVCH1T45FU (Toshiba) - 10

74AVCH1T45FU 11.3. AC Characteristics (Note) (VCCA = 0.8 V, Ta = 25 �) VCCB VCCB VCCB VCCB VCCB VCCB VCCB VCCB Characteristics Symbol 0.8 V 0.9 V 1.0 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V Unit Typ. Typ. Typ. Typ. Typ. Typ. Typ. Typ. Propagation delay time (A → B) tPLH/tPHL 11.4 10.4 9.8 9.8 9.2 9.0 9.7 11.7 ns Propagation delay time (B → A) 11.4 10.0 9.1 8.0 7.2 6.8 6.2 5.9 3-state output disable time (DIR → A) tPLZ/tPHZ 18.7 18.7 18.7 18.6 18.6 18.6 18.7 18.7 3-state output disable time (DIR → B) 22.0 19.7 17.8 12.4 10.8 10.7 9.9 11.0 3-state output enable time (DIR → A) tPZL/tPZH 33.4 29.7 26.9 20.4 18.0 17.5 16.1 16.9 3-state output enable time (DIR → B) (Note 1) 30.1 29.1 28.5 28.4 27.8 27.6 28.4 30.4 Note: See Figure 12.1, 13.1, 13.2, table 12.1.1, 12.1.2, 13.1.1 for the measurement circuit. Note1: Output enable time is obtained from the following formula. Output enable time (DIR → A) = Output disable time (DIR → B) + Propagation delay time (B → A) Output enable time (DIR → B) = Output disable time (DIR → A) + Propagation delay time (A → B) 11.4. AC Characteristics (Note) (VCCB = 0.8 V, Ta = 25 �) VCCA VCCA VCCA VCCA VCCA VCCA VCCA VCCA Characteristics Symbol 0.8 V 0.9 V 1.0 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V Unit Typ. Typ. Typ. Typ. Typ. Typ. Typ. Typ. Propagation delay time (A → B) tPLH/tPHL 11.4 10.0 9.1 8.0 7.2 6.8 6.2 5.9 ns Propagation delay time (B → A) 11.4 10.4 9.8 9.8 9.2 9.0 9.7 11.7 3-state output disable time (DIR → A) tPLZ/tPHZ 18.7 15.1 12.8 6.9 5.1 4.8 3.3 3.7 3-state output disable time (DIR → B) 22.0 20.0 19.0 18.6 19.3 19.3 20.6 21.9 3-state output enable time (DIR → A) tPZL/tPZH 33.4 30.4 28.8 28.4 28.5 28.3 30.3 33.6 3-state output enable time (DIR → B) (Note 1) 30.1 25.1 21.9 14.9 12.3 11.6 9.5 9.6 Note: See Figure 12.1, 13.1, 13.2, table 12.1.1, 12.1.2, 13.1.1 for the measurement circuit. Note 1: Output enable time is obtained from the following formula. Output enable time (DIR → A) = Output disable time (DIR → B) + Propagation delay time (B → A) Output enable time (DIR → B) = Output disable time (DIR → A) + Propagation delay time (A → B) 11.5. AC Characteristics (Note) (VCCA = 0.9 ± 0.045 V, Ta = -40 to 85 �) VCCB VCCB VCCB VCCB VCCB VCCB VCCB 0.9 ± 1.0 1.2 1.5 1.8 2.5 3.3 Characteristics Symbol Unit 0.045 V ± 0.05 V ± 0.1 V ± 0.1 V ± 0.15 V ± 0.2 V ± 0.3 V Max Max Max Max Max Max Max Propagation delay time (A → B) tPLH/tPHL 17.7 15.8 15.2 13.8 13.2 13.5 16.7 ns Propagation delay time (B → A) 17.7 15.2 13.1 11.7 10.7 10.1 10.4 3-state output disable time (DIR → A) tPLZ/tPHZ 24.7 24.7 24.7 24.7 24.7 24.8 25.8 3-state output disable time (DIR → B) 28.1 24.8 18.6 16.1 15.4 13.9 14.6 3-state output enable time (DIR → A) tPZL/tPZH 45.8 40.0 31.7 27.8 26.1 24.0 25.0 3-state output enable time (DIR → B) (Note 1) 42.4 40.5 39.9 38.5 37.9 38.3 42.5 Note: See Figure 12.1, 13.1, 13.2, table 12.1.1, 12.1.2, 13.1.1 for the measurement circuit. Note 1: Output enable time is obtained from the following formula. Output enable time (DIR → A) = Output disable time (DIR → B) + Propagation delay time (B → A) Output enable time (DIR → B) = Output disable time (DIR → A) + Propagation delay time (A → B) ©2026 10 Toshiba Electronic Devices & Storage Corporation 2026-04-21 Rev.2.0.A