Vittorio Ricchiuti was born in Taranto, Italy, 25 February 1961. He received the ‘Laurea’ degree in Electonic Engineering from the University of Pisa in 1989. Since 1989 he has been working at Italtel R&D Lab. in L’Aquila (then Siemens CNX, now Technolabs), as hardware designer, in the field of data transmission via low voltage and middle voltage electrical power network for load management. Since november 1993 its interest was in the field of SDH network as expert in stability of slave clocks in synchronization networks and as system engineer and designer of an STM16 (2.5 Gbit/s) optical line regenerator. In april 1998 he started its activity in the field of the Signal & Power Integrity and in the 2000-2001 he was responsible for the Siemens activities in the UMR (University of Missouri-Rolla) EMC Consortium. Since 2001 he has been director of the Printed Circuit Board layout group in Siemens CNX. In the 2007-2008 he has been project leader for the designing of a 10Gbps optical Add Drop Multiplex.
From 2019 he is Vice President of Design at Technoprobe SpA, Cernusco Lombardone, Italy.
He is IEEE Senior Member and member of TC-10 Signal Integrity Committee with more than 40 papers in referred scientific journals and international conferences and 5 patents.