Datasheet Texas Instruments ADC32RF45IRMP
| Manufacturer | Texas Instruments |
| Series | ADC32RF45 |
| Part Number | ADC32RF45IRMP |
Dual-Channel, 14-Bit, 3-GSPS RF-Sampling Analog-to-Digital Converter (ADC) 72-VQFN -40 to 85
Datasheets
ADC32RF45 Dual-Channel, 14-Bit, 3.0-GSPS, Analog-to-Digital Converter datasheet
PDF, 7.3 Mb, Revision: C, File published: Dec 6, 2016
Extract from the document
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| Pin | 72 |
| Package Type | RMP |
| Industry STD Term | VQFNP |
| JEDEC Code | S-PQFP-N |
| Package QTY | 1 |
| Carrier | JEDEC TRAY (5+1) |
| Device Marking | AZ32RF45 |
| Width (mm) | 10 |
| Length (mm) | 10 |
| Thickness (mm) | .9 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1 |
| Mechanical Data | Download |
Parametrics
| # Input Channels | 2 |
| Analog Input BW | 3200 MHz |
| Architecture | Pipeline |
| ENOB | 9.7 Bits |
| Input Buffer | Yes |
| Input Range | 1.35 Vp-p |
| Interface | JESD204B |
| Operating Temperature Range | -40 to 85 C |
| Package Group | VQFN |
| Package Size: mm2:W x L | 72VQFN: 100 mm2: 10 x 10(VQFN) PKG |
| Power Consumption(Typ) | 6400 mW |
| Rating | Catalog |
| Reference Mode | Int |
| Resolution | 14 Bits |
| SFDR | 67 dB |
| SINAD | 60.2 dB |
| SNR | 60.9 dB |
| Sample Rate(Max) | 3000 MSPS |
Eco Plan
| RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: TSW40RF80EVM
2T2R RF-Sampling Transceiver With Dual 14-Bit 3GSPS ADC, Dual 14-Bit 9GSPS DAC and Clocking Solution
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: ADC32RF45EVM
ADC32RF45 Dual-Channel, 14-Bit, 3GSPS, RF-Sampling ADC Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- How unmatched impedance at the clock input of an RF ADC affects SNR and jitterPDF, 2.3 Mb, File published: Jul 21, 2016
- Implementing JESD204B SYSREF and Achieving Deterministic Latency with ADC32RF45PDF, 105 Kb, File published: May 10, 2016
ADC32RF45 Implementing JESD204B SYSREF and achieving deterministic latency with ADC32RF45 ADC32RF45_SBAA221 HPA/HSP/HS_DC/App_Reports - S-Parameters for ADC32RF45: Modeling and ApplicationPDF, 1.8 Mb, File published: May 16, 2016
- Designing a modern power supply for RF sampling convertersPDF, 429 Kb, File published: Apr 26, 2017
- Clocking Optimization for RF Sampling Analog-to-Digital ConvertersPDF, 261 Kb, File published: May 17, 2016
- ADC32RF45: Amplifier to ADC Interface (Rev. A)PDF, 176 Kb, Revision: A, File published: Sep 7, 2016
- Configuration Files for ADC32RF45, ADC32RF83, and ADC32RF80 (Rev. B)ZIP, 211 Kb, Revision: B, File published: Sep 5, 2017
- RF Sampling ADC with 800MHz of IBW LTEPDF, 846 Kb, File published: Sep 8, 2016
Model Line
Series: ADC32RF45 (2)
- ADC32RF45IRMP ADC32RF45IRMPT
Manufacturer's Classification
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)