Datasheet Texas Instruments 74AC11086DR
| Manufacturer | Texas Instruments |
| Series | 74AC11086 |
| Part Number | 74AC11086DR |
Quadruple 2-Input Exclusive-OR Gates 16-SOIC -40 to 85
Datasheets
Quadruple 2-Input Exclusive-OR Gate datasheet
PDF, 251 Kb, Revision: A, File published: Apr 1, 1996
Extract from the document
Prices
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 16 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Width (mm) | 3.91 |
| Length (mm) | 9.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Download |
Parametrics
| Approx. Price (US$) | 0.94 | 1ku |
| Bits(#) | 4 |
| F @ Nom Voltage(Max)(Mhz) | 100 |
| ICC @ Nom Voltage(Max)(mA) | 0.04 |
| Input Type | CMOS |
| Operating Temperature Range(C) | -40 to 85 |
| Output Drive (IOL/IOH)(Max)(mA) | 24/-24 |
| Output Type | CMOS |
| Package Group | SOIC |
| Package Size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | AC |
| VCC(Max)(V) | 5.5 |
| VCC(Min)(V) | 3 |
| Voltage(Nom)(V) | 3.3 5 |
| tpd @ Nom Voltage(Max)(ns) | 10.6 7.6 |
Eco Plan
| RoHS | Not Compliant |
| Pb Free | No |
Application Notes
- Live InsertionPDF, 150 Kb, File published: Oct 1, 1996
Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha - Introduction to LogicPDF, 93 Kb, File published: Apr 30, 2015
- Shelf-Life Evaluation of Lead-Free Component FinishesPDF, 1.3 Mb, File published: May 24, 2004
The integrated circuit (IC) industry is converting to lead (Pb)-free termination finishes for leadframe-based packages. IC component users need to know the maximum length of time that components can be stored prior to being soldered. This study predicts shelf life of the primary Pb-free finishes being proposed by the industry. Components were exposed to a controlled environment, with known aging a - Semiconductor Packing Material Electrostatic Discharge (ESD) ProtectionPDF, 337 Kb, File published: Jul 8, 2004
Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge - Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)PDF, 614 Kb, Revision: C, File published: Dec 2, 2015
- Input and Output Characteristics of Digital Integrated CircuitsPDF, 1.7 Mb, File published: Oct 1, 1996
This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou - CMOS Power Consumption and CPD Calculation (Rev. B)PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale - TI IBIS File Creation Validation and Distribution ProcessesPDF, 380 Kb, File published: Aug 29, 2002
The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con - Implications of Slow or Floating CMOS Inputs (Rev. D)PDF, 260 Kb, Revision: D, File published: Jun 23, 2016
- Designing With Logic (Rev. C)PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w - Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
Model Line
Series: 74AC11086 (5)
- 74AC11086D 74AC11086DR 74AC11086DRE4 74AC11086DRG4 74AC11086N
Manufacturer's Classification
- Semiconductors > Logic > Gate > XOR (Exclusive OR) Gate
