Datasheet Texas Instruments 74ACT11000

ManufacturerTexas Instruments
Series74ACT11000
Datasheet Texas Instruments 74ACT11000

Quadruple 2-Input Positive-NAND Gates

Datasheets

Quadruple 2-Input Positive-NAND Gates datasheet
PDF, 384 Kb, Revision: A, File published: Apr 1, 1993
Extract from the document

Prices

Status

74ACT11000D74ACT11000DE474ACT11000DG474ACT11000DR74ACT11000DRG474ACT11000N74ACT11000NSR74ACT11000NSRE474ACT11000NSRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Obsolete (Manufacturer has discontinued the production of the device)Obsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNoNo

Packaging

74ACT11000D74ACT11000DE474ACT11000DG474ACT11000DR74ACT11000DRG474ACT11000N74ACT11000NSR74ACT11000NSRE474ACT11000NSRG4
N123456789
Pin161616161616161616
Package TypeDDDDDNNSNSNS
Industry STD TermSOICSOICSOICSOICSOICPDIPSOPSOPSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY4040402500250025
CarrierTUBETUBETUBELARGE T&RLARGE T&RTUBE
Device MarkingACT11000ACT11000ACT11000ACT11000ACT1100074ACT11000N
Width (mm)3.913.913.913.913.916.355.35.35.3
Length (mm)9.99.99.99.99.919.310.310.310.3
Thickness (mm)1.581.581.581.581.583.91.951.951.95
Pitch (mm)1.271.271.271.271.272.541.271.271.27
Max Height (mm)1.751.751.751.751.755.08222
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / Models74ACT11000D
74ACT11000D
74ACT11000DE4
74ACT11000DE4
74ACT11000DG4
74ACT11000DG4
74ACT11000DR
74ACT11000DR
74ACT11000DRG4
74ACT11000DRG4
74ACT11000N
74ACT11000N
74ACT11000NSR
74ACT11000NSR
74ACT11000NSRE4
74ACT11000NSRE4
74ACT11000NSRG4
74ACT11000NSRG4
Approx. Price (US$)0.88 | 1ku0.88 | 1ku0.88 | 1ku
Bits444444
Bits(#)444
F @ Nom Voltage(Max), Mhz909090909090
F @ Nom Voltage(Max)(Mhz)909090
ICC @ Nom Voltage(Max), mA0.040.040.040.040.040.04
ICC @ Nom Voltage(Max)(mA)0.040.040.04
Input TypeTTLTTLTTL
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-2424/-24
Output Drive (IOL/IOH)(Max)(mA)24/-2424/-2424/-24
Output TypeCMOSCMOSCMOS
Package GroupSOICSOICSOICSOICSOICPDIPPDIP
SOIC
PDIP
SOIC
PDIP
SOIC
Package Size: mm2:W x L, PKG16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)See datasheet (PDIP)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)See datasheet (PDIP)See datasheet (PDIP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNo
Technology FamilyACTACTACTACTACTACTACTACTACT
VCC(Max), V5.55.55.55.55.55.5
VCC(Max)(V)5.55.55.5
VCC(Min), V4.54.54.54.54.54.5
VCC(Min)(V)4.54.54.5
Voltage(Nom), V555555
Voltage(Nom)(V)555
tpd @ Nom Voltage(Max), ns12.312.312.312.312.312.3
tpd @ Nom Voltage(Max)(ns)12.312.312.3

Eco Plan

74ACT11000D74ACT11000DE474ACT11000DG474ACT11000DR74ACT11000DRG474ACT11000N74ACT11000NSR74ACT11000NSRE474ACT11000NSRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantNot CompliantNot CompliantNot Compliant
Pb FreeYesNoNoNo

Application Notes

  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, Revision: A, File published: Jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
  • Introduction to Logic
    PDF, 93 Kb, File published: Apr 30, 2015
  • Shelf-Life Evaluation of Lead-Free Component Finishes
    PDF, 1.3 Mb, File published: May 24, 2004
    The integrated circuit (IC) industry is converting to lead (Pb)-free termination finishes for leadframe-based packages. IC component users need to know the maximum length of time that components can be stored prior to being soldered. This study predicts shelf life of the primary Pb-free finishes being proposed by the industry. Components were exposed to a controlled environment, with known aging a
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, Revision: C, File published: Dec 2, 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, File published: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, File published: Aug 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Kb, Revision: D, File published: Jun 23, 2016
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Gate> NAND Gate
EMS supplier