Datasheet Texas Instruments CD74AC86

ManufacturerTexas Instruments
SeriesCD74AC86
Datasheet Texas Instruments CD74AC86

Quad 2-Input Exclusive-OR Gates

Datasheets

CD74AC86 datasheet
PDF, 811 Kb, File published: Jan 17, 2003
Extract from the document

Prices

Status

CD74AC86ECD74AC86MCD74AC86M96CD74AC86M96E4CD74AC86MG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoYes

Packaging

CD74AC86ECD74AC86MCD74AC86M96CD74AC86M96E4CD74AC86MG4
N12345
Pin1414141414
Package TypeNDDDD
Industry STD TermPDIPSOICSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY25502500250050
CarrierTUBETUBELARGE T&RLARGE T&RTUBE
Device MarkingCD74AC86EAC86MAC86MAC86MAC86M
Width (mm)6.353.913.913.913.91
Length (mm)19.38.658.658.658.65
Thickness (mm)3.91.581.581.581.58
Pitch (mm)2.541.271.271.271.27
Max Height (mm)5.081.751.751.751.75
Mechanical DataDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsCD74AC86E
CD74AC86E
CD74AC86M
CD74AC86M
CD74AC86M96
CD74AC86M96
CD74AC86M96E4
CD74AC86M96E4
CD74AC86MG4
CD74AC86MG4
Bits44444
F @ Nom Voltage(Max), Mhz100100100100100
ICC @ Nom Voltage(Max), mA0.040.040.040.040.04
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-24
Package GroupPDIPSOICSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)
RatingCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNo
Technology FamilyACACACACAC
VCC(Max), V5.55.55.55.55.5
VCC(Min), V1.51.51.51.51.5
Voltage(Nom), V1.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,5
tpd @ Nom Voltage(Max), ns123,13.7,9.8123,13.7,9.8123,13.7,9.8123,13.7,9.8123,13.7,9.8

Eco Plan

CD74AC86ECD74AC86MCD74AC86M96CD74AC86M96E4CD74AC86MG4
RoHSCompliantCompliantCompliantCompliantCompliant
Pb FreeYes

Application Notes

  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Gate> XOR (Exclusive OR) Gate