Datasheet Texas Instruments LP2996AMR/NOPB

1.5A DDR Termination Regulator with Shutdown Pin 8-SO PowerPAD 0 to 125

Datasheets

PDF, 2.5 Mb, File published: Jun 27, 2014

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Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

Control Mode	N/A
DDR Memory Type	DDR,DDR2,DDR3,DDR3L
Iout VTT(Max)	1.5 A
Iq(Typ)	0.32 mA
Operating Temperature Range	0 to 125 C
Output	VREF,VTT
Package Group	SO PowerPAD
Package Size: mm2:W x L	8SO PowerPAD: 29 mm2: 6 x 4.9(SO PowerPAD) PKG
Rating	Catalog
Regulator Type	Linear Regulator
Special Features	Shutdown Pin for S3
Vin Bias(Max)	5.5 V
Vin Bias(Min)	2.2 V
Vin(Max)	5.5 V
Vin(Min)	1.35 V
Vout VTT(Min)	0.677 V

RoHS

Compliant

Evaluation Modules & Boards: LP2998EVAL
Evaluation Board for the LP2998
Lifecycle Status: Active (Recommended for new designs)
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Limiting DDR Termination RegulatorsвЂ™ Inrush Current
PDF, 772 Kb, File published: Aug 23, 2016
The output voltage of DDR termination regulators tends to rise quickly after their VDDQ line is enabled. Most DDR terminators are specifically designed for fast start-up. They also require bulky output capacitors for a stable output voltage. This often results in a significant inrush current from DDR terminator voltage supply to charge the output capacitors and to provide curre

Series: LP2996A (3)