Datasheet Texas Instruments SN74AUC2G34

ManufacturerTexas Instruments
SeriesSN74AUC2G34
Datasheet Texas Instruments SN74AUC2G34

Dual Buffer Gate

Datasheets

SN74AUC2G34 datasheet
PDF, 1.0 Mb, Revision: B, File published: Jan 15, 2007
Extract from the document

Prices

Status

SN74AUC2G34DBVRSN74AUC2G34DCKRSN74AUC2G34DCKRE4SN74AUC2G34DRLRSN74AUC2G34DRLRG4SN74AUC2G34YZPR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesYesYesYesYes

Packaging

SN74AUC2G34DBVRSN74AUC2G34DCKRSN74AUC2G34DCKRE4SN74AUC2G34DRLRSN74AUC2G34DRLRG4SN74AUC2G34YZPR
N123456
Pin666666
Package TypeDBVDCKDCKDRLDRLYZP
Industry STD TermSOT-23SOT-SC70SOT-SC70SOT-5X3SOT-5X3DSBGA
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-NR-PDSO-NR-XBGA-N
Package QTY300030003000400040003000
CarrierLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Device MarkingU34RU9RU9RU9RU97U9N
Width (mm)1.61.251.251.21.2.9
Length (mm)2.9221.61.61.5
Thickness (mm)1.2.9.9.55.552
Pitch (mm).95.65.65.5.5.5
Max Height (mm)1.451.11.1.6.6.5
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsSN74AUC2G34DBVR
SN74AUC2G34DBVR
SN74AUC2G34DCKR
SN74AUC2G34DCKR
SN74AUC2G34DCKRE4
SN74AUC2G34DCKRE4
SN74AUC2G34DRLR
SN74AUC2G34DRLR
SN74AUC2G34DRLRG4
SN74AUC2G34DRLRG4
SN74AUC2G34YZPR
SN74AUC2G34YZPR
3-State OutputNoNoNoNoNoNo
Bits222222
F @ Nom Voltage(Max), Mhz250250250250250250
Gate TypeBUFFERBUFFERBUFFERBUFFERBUFFERBUFFER
ICC @ Nom Voltage(Max), mA0.010.010.010.010.010.01
LogicTrueTrueTrueTrueTrueTrue
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA9/-99/-99/-99/-99/-99/-9
Package GroupSOT-23SC70SC70SOT-5X3SOT-5X3DSBGA
Package Size: mm2:W x L, PKG6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SC70: 4 mm2: 2.1 x 2(SC70)6SC70: 4 mm2: 2.1 x 2(SC70)6SOT-5X3: 3 mm2: 1.6 x 1.6(SOT-5X3)6SOT-5X3: 3 mm2: 1.6 x 1.6(SOT-5X3)See datasheet (DSBGA)
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNo
Special FeaturesIOFF,low power consumption,low tpdIOFF,low power consumption,low tpdIOFF,low power consumption,low tpdIOFF,low power consumption,low tpdIOFF,low power consumption,low tpdIOFF,low power consumption,low tpd
Sub-FamilyNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/Driver
Technology FamilyAUCAUCAUCAUCAUCAUC
VCC(Max), V2.72.72.72.72.72.7
VCC(Min), V0.80.80.80.80.80.8
Voltage(Nom), V0.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.5
tpd @ Nom Voltage(Max), ns6.4,3.4,2.3,1.6,1.26.4,3.4,2.3,1.6,1.26.4,3.4,2.3,1.6,1.26.4,3.4,2.3,1.6,1.26.4,3.4,2.3,1.6,1.26.4,3.4,2.3,1.6,1.2

Eco Plan

SN74AUC2G34DBVRSN74AUC2G34DCKRSN74AUC2G34DCKRE4SN74AUC2G34DRLRSN74AUC2G34DRLRG4SN74AUC2G34YZPR
RoHSCompliantCompliantCompliantCompliantCompliantCompliant

Application Notes

  • Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices
    PDF, 374 Kb, File published: Mar 21, 2003
    System designers are continuously seeking ways to improve signal integrity, increase speed, and reduce power consumption in personal computers, telecommunication equipment, and other electronic systems. The Texas Instruments (TI) next-generation Advanced Ultra-low-voltage CMOS (AUC) octals and Widebus(TM) devices are designed to achieve these goals. These devices are designed for a 0.8-V to 2.7-V

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Little Logic