Datasheet Texas Instruments SN74AUP2G126

ManufacturerTexas Instruments
SeriesSN74AUP2G126
Datasheet Texas Instruments SN74AUP2G126

Low-Power Dual Bus Buffer Gate With 3-State Outputs

Datasheets

SN74AUP2G126 Low-Power Dual Bus Buffer Gate With 3-State Outputs datasheet
PDF, 1.4 Mb, Revision: D, File published: Dec 30, 2009
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Prices

Status

SN74AUP2G126DCURSN74AUP2G126DQERSN74AUP2G126RSERSN74AUP2G126YFPRSN74AUP2G126YZPR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesYesYesYes

Packaging

SN74AUP2G126DCURSN74AUP2G126DQERSN74AUP2G126RSERSN74AUP2G126YFPRSN74AUP2G126YZPR
N12345
Pin88888
Package TypeDCUDQERSEYFPYZP
Industry STD TermVSSOPX2SONUQFNDSBGADSBGA
JEDEC CodeR-PDSO-GR-PSSO-NS-PQFP-NR-XBGA-NR-XBGA-N
Package QTY30005000500030003000
CarrierLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Device MarkingH26RPWPWHNNHNN
Width (mm)211.52.25
Length (mm)2.31.41.51.25
Thickness (mm).85.37.55.31
Pitch (mm).5.35.5.4.5
Max Height (mm).9.4.6.5.5
Mechanical DataDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsSN74AUP2G126DCUR
SN74AUP2G126DCUR
SN74AUP2G126DQER
SN74AUP2G126DQER
SN74AUP2G126RSER
SN74AUP2G126RSER
SN74AUP2G126YFPR
SN74AUP2G126YFPR
SN74AUP2G126YZPR
SN74AUP2G126YZPR
3-State OutputYesYesYesYesYes
Bits22222
F @ Nom Voltage(Max), Mhz100100100100100
Gate TypeBUFFERBUFFERBUFFERBUFFERBUFFER
ICC @ Nom Voltage(Max), mA0.00090.00090.00090.00090.0009
LogicTrueTrueTrueTrueTrue
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA4/-44/-44/-44/-44/-4
Package GroupVSSOPX2SONUQFNDSBGADSBGA
Package Size: mm2:W x L, PKG8VSSOP: 6 mm2: 3.1 x 2(VSSOP)8X2SON: 1 mm2: 1 x 1.4(X2SON)8UQFN: 2 mm2: 1.5 x 1.5(UQFN)See datasheet (DSBGA)See datasheet (DSBGA)
RatingCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNo
Special FeaturesIOFF,low power consumption,low tpd,3-stateIOFF,low power consumption,low tpd,3-stateIOFF,low power consumption,low tpd,3-stateIOFF,low power consumption,low tpd,3-stateIOFF,low power consumption,low tpd,3-state
Sub-FamilyNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/Driver
Technology FamilyAUPAUPAUPAUPAUP
VCC(Max), V3.63.63.63.63.6
VCC(Min), V0.80.80.80.80.8
Voltage(Nom), V0.8,1.2,1.5,1.8,2.5,3.30.8,1.2,1.5,1.8,2.5,3.30.8,1.2,1.5,1.8,2.5,3.30.8,1.2,1.5,1.8,2.5,3.30.8,1.2,1.5,1.8,2.5,3.3
tpd @ Nom Voltage(Max), ns36.4,30.8,18,13.6,8.6,7.936.4,30.8,18,13.6,8.6,7.936.4,30.8,18,13.6,8.6,7.936.4,30.8,18,13.6,8.6,7.936.4,30.8,18,13.6,8.6,7.9

Eco Plan

SN74AUP2G126DCURSN74AUP2G126DQERSN74AUP2G126RSERSN74AUP2G126YFPRSN74AUP2G126YZPR
RoHSCompliantCompliantCompliantCompliantCompliant

Application Notes

  • Understanding Schmitt Triggers
    PDF, 80 Kb, File published: Sep 21, 2011

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Little Logic